SP791CN SIPEX [Sipex Corporation], SP791CN Datasheet - Page 5

• Manufacturer Part Number: SP791CN
• Description: Low Power Microprocessor Supervisory with Battery Switch-Over
• Manufacturer: SIPEX [Sipex Corporation]

SP791DS/08
PINOUT
PIN ASSIGNMENTS
Pin 1 — V
Pin 2 —V
Pin 3 — V
Pin 4 — GND — Ground reference for all signals
Pin 5 — BATT ON — Battery On Output. Goes
Pin 6 — PFO — Power-Fail Output. This is the
Pin 7 — PFI — Power-Fail Input. This is the
Pin 8 — SWT — Set Watchdog-Timeout Input.
to external battery or capacitor and charging
circuit.
nects to V
and V
V
reset threshold, V
nect a 0.1 F capacitor from V
+5V input
high when V
when V
of a PNP through a current-limiting resistor
to BATT ON for V
greater than 250mA.
output of the power-fail comparator. PFO
goes low when PFI is less than1.25V. This is
an uncommitted comparator, and has no ef-
fect on any other internal circuitry.
noninverting input to the power-fail compara-
tor. When PFI is less than 1.25V, PFO goes
low. Connect PFI to GND or V
used.
Connect this input to V
fault 1.6 sec watchdog timeout period. Con-
nect a capacitor between this input and GND
BATT ON
CC
V
V
GND
SWT
falls below V
OUT
PFO
BATT
Vcc
OUT
PFI
BATT
CC
— Output Supply Voltage. V
OUT
CC
is above the reset threshold. When
— Backup-Battery Input. Connect
1
2
3
4
6
7
8
5
CC
— Input Supply Voltage —
switches to V
when V
OUT
TOP VIEW
SP791 Low Power Microprocessor Supervisory with Battery Switch-Over
DIP/SO
switches to V
OUT
Corporation
BATT
OUT
connects to V
CC
and V
current requirements
is greater than V
CC
OUT
. Connect the base
16
15
12
14
13
10
11
9
to select the de-
CC
WDPO
RESET
CE
WDO
WDI
LOWLINE
MR
BATT
CE
OUT
is below the
OUT
OUT
. Goes low
IN
to GND.
BATT
when not
OUT
. Con-
con-
BATT
5
Pin 9 — MR — Manual-Reset Input. This input
Pin 10 — LOWLINE — LOWLINE Output goes
Pin 11 — WDI — Watchdog Input. WDI is a three-
Pin 12 — CE
Pin 13 — CE
Pin 14 — WDO — Watchdog Output. WDO goes
Pin 15 — RESET — RESET Output goes low
Pin 16 — WDPO — Watchdog-Pulse Output.
to select another watchdog-timeout period.
Watchdog-timeout period = 2.1 x (capacitor
value in nF) ms.
can be tied to an external momentary
pushbutton switch, or to a logic gate output.
RESET remains low as long as MR is held
low and for 200ms after MR returns high.
low when V
set threshold. The output can be used to gen-
erate an NMI (nonmaskable interrupt) if the
unregulated supply is inaccessible.
level input. If WDI remains either high or
low for longer than the watchdog timeout
period, WDO goes low. WDO remains low
until the next transition at WDI. Leaving
WDI unconnected disables the watchdog
function. WDI connects to an internal volt-
age divider between V
sets it to mid-supply when left unconnected.
CE
and V
IN
stay low for 15us or until CE
whichever occurs first.
to chip-enable gating circuit. Connect to
GND or V
low if WDI remains either high or low longer
than the watchdog timeout period. WDO
returns high on the next transition at WDI.
WDO remains high if WDI is unconnected.
WDO is also high when RESET is asserted.
whenever V
old. RESET will remain low for 200ms
after V
power-up.
Upon the absence of a transition at WDI,
WDPO will pulse low for a minimum of
1ms. WDPO precedes WDO by 70ns.
is low when reset is asserted, CE
OUT
CC
CC
IN
goes low only when CE
is above the reset threshold. If CE
OUT
crosses the reset threshold on
— Chip-Enable Input. The Input
OUT
CC
CC
if not used.
falls below the reset thresh-
falls to 150mV above the re-
— Chip-Enable Output.
© Copyright 2000 Sipex Corporation
OUT
and GND, which
IN
goes high,
IN
OUT
is low
will