BS62LV4001 BSI [Brilliance Semiconductor], BS62LV4001 Datasheet

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BS62LV4001

Manufacturer Part Number
BS62LV4001
Description
Low Power/Voltage CMOS SRAM 512K X 8 bit
Manufacturer
BSI [Brilliance Semiconductor]
Datasheet

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R0201-BS62LV4001
• Wide Vcc operation voltage : 2.4V ~ 5.5V
• Low power consumption
• High speed access time :
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
PIN CONFIGURATIONS
Brilliance Semiconductor Inc
Vcc = 3.0V
Vcc = 5.0V
FEATURES
PRODUCT FAMILY
-70
-10
VC
A11
A13
A17
A15
A18
A16
A14
A12
WE
BSI
A9
A8
A7
A6
A5
A4
C
GND
DQ0
DQ1
DQ2
100ns (Max.) at Vcc = 3.0V
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
70ns (Max.) at Vcc = 3.0V
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
C-grade: 20mA (Max.) operating current
C-grade: 45mA (Max.) operation current
I -grade: 25mA (Max.) operating current
0.25uA (Typ.) CMOS standby current
I -grade: 50mA (Max.) operating current
1.5uA (Typ.) CMOS standby current
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
BS62LV4001SC
BS62LV4001SI
BS62LV4001EC
BS62LV4001EI
BS62LV4001PC
BS62LV4001PI
BS62LV4001TC
BS62LV4001STC
BS62LV4001TI
BS62LV4001STI
Low Power/Voltage CMOS SRAM
512K X 8 bit
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
. reserves the right to modify document contents without notice.
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
A3
The BS62LV4001 is a high performance, low power CMOS
Static Random Access Memory organized as 524,288 words by 8 bits
and operates from a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with maximum access time of 70/ 100ns
in 3.0V operation.
Easy memory expansion is provided by an active LOW chip
enable (CE), and active LOW output enable (OE) and three-state
output drivers.
The BS62LV4001 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV4001 is available in DICE form, JEDEC standard 32 pin
SOP, 32 pin TSOPII, 32 pin TSOP and 32 pin Small SOP.
1
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
A13
A17
A15
A18
A16
A14
A12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
Vdd
Gnd
A7
A6
A5
A4
WE
CE
OE
Address
Buffer
Input
8
Control
8
22
Output
Buffer
Buffer
Data
Input
Data
Decoder
Row
8
2048
8
BS62LV4001
A11 A9 A8 A3 A2 A1 A0 A10
Address Input Buffer
Column Decoder
Memory Array
2048 X 2048
Sense Amp
Write Driver
Column I/O
2048
256
16
Revision 2.5
April 2002

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