K7A801800 Samsung semiconductor, K7A801800 Datasheet - Page 10

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K7A801800

Manufacturer Part Number
K7A801800
Description
256Kx36 & 512Kx18-Bit Synchronous Pipelined Burst SRAM
Manufacturer
Samsung semiconductor
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
K7A801800B-PC16
Manufacturer:
SAMSUNG
Quantity:
3 760
K7A403600B
K7A403200B
K7A401800B
AC TIMING CHARACTERISTICS
Notes :
Cycle Time
Clock Access Time
Output Enable to Data Valid
Clock High to Output Low-Z
Output Hold from Clock High
Output Enable Low to Output Low-Z
Output Enable High to Output High-Z
Clock High to Output High-Z
Clock High Pulse Width
Clock Low Pulse Width
Address Setup to Clock High
Address Status Setup to Clock High
Data Setup to Clock High
Write Setup to Clock High (GW, BW, WEX)
Address Advance Setup to Clock High
Chip Select Setup to Clock High
Address Hold from Clock High
Address Status Hold from Clock High
Data Hold from Clock High
Write Hold from Clock High (GW, BW, WEX)
Address Advance Hold from Clock High
Chip Select Hold from Clock High
ZZ High to Power Down
ZZ Low to Power Up
Dout
* Capacitive Load consists of all components of
the test environment.
1. The above parameters are also guaranteed at industrial temperature range.
2. All address inputs must meet the specified setup and hold times for all rising clock edges whenever ADSC and/or ADSP
3. Both chip selects must be active whenever ADSC or ADSP is sampled low in order for the this device to remain enabled.
4. ADSC or ADSP must not be asserted for at least 2 Clock after leaving ZZ state.
Output Load(A)
is sampled low and CS is sampled low. All other synchronous inputs must meet the specified setup and hold times
whenever this device is chip selected.
Z0=50
PARAMETER
RL=50
(T
128Kx36/x32 & 256Kx18 Synchronous SRAM
30pF*
A
=0 to 70 C, V
VL=1.5V for 3.3V I/O
V
Fig. 1
DDQ
- 10 -
DD
/2 for 2.5V I/O
=3.3V+0.3V/-0.165V)
Symbol
tHZOE
tADVH
tADVS
tLZOE
tCYC
tHZC
tCSS
tCSH
tPDS
tPUS
tLZC
tWS
tWH
tCD
tOE
tOH
tCH
tDS
tAH
tSH
tDH
tCL
tAS
tSS
* Including Scope and Jig Capacitance
353
Output Load(B)
(for t
Dout
Min
6.0
1.5
1.5
2.4
2.4
1.5
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
0.5
0
0
2
2
-
-
-
LZC
1538
-16
, t
LZOE
Max
3.5
3.5
3.5
3.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
, t
HZOE
Min
7.2
1.5
1.5
2.8
2.8
1.5
1.5
1.5
1.5
1.5
1.5
0.5
0.5
0.5
0.5
0.5
0.5
& t
0
0
2
2
-
-
-
HZC
-14
+3.3V for 3.3V I/O
/+2.5V for 2.5V I/O
319
5pF*
)
Max
4.0
4.0
4.0
4.0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1667
Nov 2001
cycle
cycle
Rev 1.0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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