K7R321882 Samsung semiconductor, K7R321882 Datasheet - Page 18

• Manufacturer Part Number: K7R321882
• Description: 1Mx36 & 2Mx18 & 4Mx9 QDRTM II b2 SRAM
• Manufacturer: Samsung semiconductor

K7R323682M
K7R321882M
K7R320982M
JTAG DC OPERATING CONDITIONS
Note: 1. The input level of SRAM pin is to follow the SRAM DC specification
JTAG AC TEST CONDITIONS
Note: 1. See SRAM AC test output load on page 11.
JTAG AC Characteristics
JTAG TIMING DIAGRAM
Power Supply Voltage
Input High Level
Input Low Level
Output High Voltage(I
Output Low Voltage(I
Input High/Low Level
Input Rise/Fall Time
Input and Output Timing Reference Level
TCK Cycle Time
TCK High Pulse Width
TCK Low Pulse Width
TMS Input Setup Time
TMS Input Hold Time
TDI Input Setup Time
TDI Input Hold Time
SRAM Input Setup Time
SRAM Input Hold Time
Clock Low to Output Valid
(SRAM)
TMS
PI
TDO
TCK
TDI
Parameter
Parameter
Parameter
OL
OH
=2mA)
=-2mA)
t
C H C H
t
CLQV
Symbol
1Mx36 & 2Mx18 & 4Mx9 QDR
Symbol
V
TR/TF
V
V
V
V
V
IH
DD
O H
OL
I H
IL
/V
t
t
t
Symbol
MVCH
DVCH
SVCH
IL
t
t
t
t
t
t
t
t
t
t
CHCH
MVCH
CHMX
CHCL
CLCH
DVCH
CHDX
SVCH
CHSX
CLQV
- 18 -
.
Min
-0.3
V
1.7
1.3
1.4
SS
t
t
t
CHMX
C H D X
CHSX
Min
50
20
20
5
5
5
5
5
5
0
t
C H C L
1.8/0.0
1.0/1.0
Typ
Min
1.8
0.9
-
-
-
-
Max
10
V
-
-
-
-
-
-
-
-
-
DD
Max
V
1.9
0.5
0.4
DD
+0.3
t
C L C H
TM
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Unit
ns
V
V
V
V
V
V
V
II b2 SRAM
Note
Dec. 2003
Note
Note
1
Rev 2.0