X24640P Xicor, X24640P Datasheet - Page 13

• Manufacturer Part Number: X24640P
• Description: 400KHz 2-Wire Serial E 2 PROM with Block Lock
• Manufacturer: Xicor

Bus Timing
X24640
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal erase/
program cycle. During the write cycle, the X24640 bus interface circuits are disabled, SDA is allowed to remain
HIGH, and the device does not respond to its slave address.
Guidelines for Calculating Typical Values of
Bus Pull-Up Resistors
Bus Timing
Write Cycle Limits
Notes: (5) Typical values are for T
SDA OUT
SDA
SCL
SDA IN
Symbol
(6) t
t
WC
SCL
120
100
80
60
40
20
time the device requires to automatically complete the internal write operation.
WR
0
(6)
0
is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum
MIN.
RESISTANCE
BUS CAPACITANCE (pF)
20
t SU:STA
R MIN =
R MAX =
MAX.
RESISTANCE
40
WORD n
8th BIT
V CC MAX
I OL MIN
C BUS
60
Write Cycle Time
t R
Parameter
A
80 100 120
= 25 C and nominal supply voltage (5V).
=1.8K
t HD:STA
ACK
t F
t AA
7038 FM 16
t HD:DAT
t HIGH
CONDITION
Min.
STOP
13
t LOW
SYMBOL TABLE
t DH
t SU:DAT
WAVEFORM
Typ.
t WC
5
(5)
CONDITION
START
INPUTS
Must be
steady
May change
from Low to
High
May change
from High to
Low
Don’t Care:
Changes
Allowed
N/A
Max.
10
t R
t SU:STO
t BUF
OUTPUTS
Will be
steady
Will change
from Low to
High
Will change
from High to
Low
Changing:
State Not
Known
Center Line
is High
Impedance
Units
ms
7038 FRM T11
7038 FM 17
7038 FM 14
7038 FM 15