HI-674A Intersil Corporation, HI-674A Datasheet

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HI-674A

Manufacturer Part Number
HI-674A
Description
Complete/ 12-Bit A/D Converters with Microprocessor Interface
Manufacturer
Intersil Corporation
Datasheet
August 1997
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
Features
• Complete 12-Bit A/D Converter with Reference and Clock
• Full 8-Bit, 12-Bit or 16-Bit Microprocessor Bus Interface
• Bus Access Time . . . . . . . . . . . . . . . . . . . . . . . . . . 150ns
• No Missing Codes Over Temperature
• Minimal Setup Time for Control Signals
• Fast Conversion Times
• Digital Error Correction (HI-774)
• Low Noise, via Current-Mode Signal
• Byte Enable/Short Cycle (A
• Supply Voltage . . . . . . . . . . . . . . . . . . . . .
Applications
• Military and Industrial Data Acquisition Systems
• Electronic Test and Scientific Instrumentation
• Process Control Systems
Pinouts
+12V/+15V SUPPLY, V
-12V/-15V SUPPLY, V
DATA MODE SEL, 12/8
- HI-574A (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 s
- HI-674A (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 s
- HI-774 (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 s
Transmission Between Chips
- Guaranteed Break-Before-Make Action, Eliminating
READ/CONVERT, R/C
BYTE ADDR/SHORT
+5V SUPPLY, V
REFERENCE INPUT
+10V REF, REF OUT
Bus Contention During Read Operation. Latched by
Start Convert Input (To Set the Conversion Length)
CHIP ENABLE, CE
BIPOLAR OFFSET
COMMON, AC
CHIP SEL, CS
CYCLE, A
10V INPUT
20V INPUT
ANALOG
BIP OFF
LOGIC
CC
EE
O
10
11
12
13
14
1
2
3
4
5
6
7
8
9
(PDIP, SBDIP)
TOP VIEW
O
Input)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
STATUS, STS
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
DIG COMMON,
DC
12V to 15V
MSB
DIGITAL
DATA
OUTPUTS
LSB
6-952
ANALOG COMMON, AC
Description
The HI-X74(A) is a complete 12-bit, Analog-to-Digital
Converter, including a +10V reference clock, three-state out-
puts and a digital interface for microprocessor control. Succes-
sive approximation conversion is performed by two monolithic
dice housed in a 28 lead package. The bipolar analog die fea-
tures the Intersil Dielectric Isolation process, which provides
enhanced AC performance and freedom from latch-up.
Custom design of each IC (bipolar analog and CMOS digital)
has yielded improved performance over existing versions of
this converter. The voltage comparator features high PSRR
plus a high speed current-mode latch, and provides precise
decisions down to 0.1 LSB of input overdrive. More than 2X
reduction in noise has been achieved by using current
instead of voltage for transmission of all signals between the
analog and digital ICs. Also, the clock oscillator is current
controlled for excellent stability over temperature.
The HI-X74(A) offers standard unipolar and bipolar input
ranges, laser trimmed for specified linearity, gain and offset
accuracy. The low noise buried zener reference circuit is
trimmed for minimum temperature coefficient.
Power requirements are +5V and 12V to 15V, with typical
dissipation of 385mW (HI-574A/674A) and 390mW (HI-774) at
12V. All models are available in sidebrazed DIP, PDIP , and
CLCC. For additional HI-Rel screening including 160 hour burn-
in, specify “-8” suffix. For MIL-STD-883 compliant parts, request
HI-574A/883, HI-674A/883, and HI-774/883 data sheets.
READ CONVERT, R/C
HI-574A, HI-674A,
REFERENCE INPUT,
+10V REFERENCE,
BIPOLAR OFFSET,
CHIP ENABLE, CE
+15V SUPPLY, V
-15V SUPPLY, V
REF OUT
Complete, 12-Bit A/D Converters
BIP OFF
REF IN
with Microprocessor Interface
NC
NC
NC
CC
EE
10
11
12
13
14
15
16
17
7
8
9
18
6
19
TOP VIEW
5
(CLCC)
20
4
21
3
22
2
23
1
44
24
File Number
HI-774
43
25
26
42
41
27
28
40
39
38
37
36
35
34
33
32
31
30
29
3096.4
NC
NC
DB9
DB8
DB7
DB6
DB5
DB4
DB3
NC
DB2

Related parts for HI-674A

HI-674A Summary of contents

Page 1

... Bus Access Time . . . . . . . . . . . . . . . . . . . . . . . . . . 150ns • No Missing Codes Over Temperature • Minimal Setup Time for Control Signals • Fast Conversion Times - HI-574A (Max HI-674A (Max HI-774 (Max • Digital Error Correction (HI-774) • Low Noise, via Current-Mode Signal Transmission Between Chips • ...

Page 2

... HI3-774K-5 0.5 LSB HI1-774J-5 1.0 LSB HI1-774K-5 0.5 LSB HI1-774U-2 0.5 LSB 0.5 LSB HI1-774T/883 HI4-774S/883 1.0 LSB HI4-774T/883 0.5 LSB HI4-774U/883 0.5 LSB HI-574A, HI-674A, HI-774 TEMPERATURE RANGE o INL ( -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 ...

Page 3

... DIGITAL CHIP ANALOG CHIP V IN REF 10K V OUT REF +10V REF ANALOG COMMON NOTE: “Nibble” 4-bit digital word. HI-574A, HI-674A, HI-774 BIT OUTPUTS MSB NIBBLE A (NOTE) NIBBLE B (NOTE) THREE-STATE BUFFERS AND CONTROL POWER-UP RESET 12 BITS SAR 12 BITS DAC ...

Page 4

... Maximum Lead Temperature (Soldering, 10s 300 Die Characteristics Transistor Count 125 C HI-574A, HI-674A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1117 HI-774 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2117 o Typical with V = +15V or +12V Unless Otherwise Specified TEMPERATURE RANGE - SUFFIX ...

Page 5

... Power Dissipation 15V, +15V 12V, +5V Internal Reference Voltage MIN MAX Output Current, Available For External Loads (External Load Should Not Change During Conversion). HI-574A, HI-674A, HI-774 o Typical with V = +15V or +12V Unless Otherwise Specified (Continued) TEMPERATURE RANGE J SUFFIX 2 ...

Page 6

... Power Supply Rejection Max Change In Full Scale Calibration +13.5V < V < +16.5V or +11.4V < +4.5V < V < +5.5V LOGIC -16.5V < V < -13.5V or -12.6V < ANALOG INPUTS Input Ranges Bipolar Unipolar HI-574A, HI-674A, HI-774 o Typical with V = +15V or +12V Unless Otherwise Specified TEMPERATURE RANGE S SUFFIX ...

Page 7

... SOURCE Logic “1” SOURCE Leakage (High-Z State, DB11-DB0 Only) Capacitance Timing Specifications (HI-574A) 25 SYMBOL CONVERT MODE t STS Delay from CE DSC HI-574A, HI-674A, HI-774 o Typical with V = +15V or +12V Unless Otherwise Specified (Continued) TEMPERATURE RANGE S SUFFIX MIN +2.4V -0.5V - ...

Page 8

... Conversion Time C READ MODE t Access Time from Data Valid After CE Low HD t Output Float Delay HL HI-574A, HI-674A, HI-774 o C, Note 2, Unless Otherwise Specified (Continued) PARAMETER 12-Bit Cycle MIN MAX 8-Bit Cycle MIN MAX o C, Note 2, Unless Otherwise Specified ...

Page 9

... STS Delay After Data Valid HS NOTES: 1. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board. 2. Time is measured from 50% level of digital transitions. Tested with a 50pF and 3k load. HI-574A, HI-674A, HI-774 o C, Note 2, Unless Otherwise Specified (Continued) PARAMETER C, Into a load with and C = 50pF, Note 2, Unless Otherwise Specifi ...

Page 10

... Data Bit 11 (MSB) 28 STS Status Bit - Status high implies a conversion is in progress. HI-574A, HI-674A, HI-774 Definitions of Specifications Linearity Error Linearity error refers to the deviation of each individual code from a line drawn from “zero” through “full scale”. The point used as “zero” occurs the fi ...

Page 11

... Each of the twelve disturbances should subside less for the HI-574A and 500ns or less for the HI-674A. (The comparator decision is made about 1.5 s and 850ns after each code change from the SAR for the HI-574A and HI-674A, respectively.) ...

Page 12

... The converter then continues to make the 4 LSB decisions, settling out to 12-bit accuracy. The last four bits can adjust the code in the positive HI-574A, HI-674A, HI-774 direction LSBs. This results in a total correction range of +31 to -32 LSBs. When an 8-bit conversion is per- formed, the input must settle to within tion (which equals 8 LSBs at 12-bit resolution) ...

Page 13

... Nominal value of an increment is one LSB. However, this approach is impractical because nothing “happens” midpoint to indicate that an HI-574A, HI-674A, HI-774 adjustment is complete. Therefore, calibration is performed in terms of the observable code changes instead of the STS 28 midpoint between code changes ...

Page 14

... STS Delay after Data Valid 300 HS t High R/C Pulse Width 150 HRH t Data Access Time - DDR Time is measured from 50% level of digital transitions. Tested with a 50pF and 3k load. HI-674A STAND-ALONE MODE TIMING SYMBOL PARAMETER MIN t Low R/C Pulse Width 50 HRL t STS Delay from R ...

Page 15

... HSC t SRC R/C t HRC SAC t HAC STS t DSC HIGH IMPEDANCE DB11-DB0 See HI-774 Timing Specifications for more information. FIGURE 4. CONVERT START TIMING HI-574A, HI-674A, HI-774 usually tied to O R/C high STS BYTE DB11-DB0 LSB See HI-774 Timing Specifications for more information. ...

Page 16

... DATA DB11-DB0 VALID FIGURE 8. LOW PULSE FOR R/C - OUTPUTS ENABLED AFTER CONVERSION R/C t HRH STS t DDR HIGH-Z DB11-DB0 FIGURE 9. HIGH PULSE FOR R/C - OUTPUTS ENABLED WHILE R/C HIGH, OTHERWISE HIGH-Z HI-574A, HI-674A, HI-774 READ CONTROL CONVERT CONTROL POWER UP RESET FIGURE 7. HI-774 CONTROL LOGIC t HRL ...

Page 17

... COMMON ANALOG COMMON V REFIN V EE HI-574A, HI-674A, HI-774 PASSIVATION: Type: Nitride Over Silox Nitride Thickness: 3.5k Silox Thickness: 12k WORST CASE CURRENT DENSITY 1 A/cm HI-574A, HI-674A, HI-774 6-968 Å Å 0.5k Å Å 1.5k DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 ...

Page 18

... For information regarding Intersil Corporation and its products, see web site http://www.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 HI-574A, HI-674A, HI-774 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ...

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