SLE4442 Siemens, SLE4442 Datasheet - Page 25
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SLE4442
Manufacturer Part Number
SLE4442
Description
(SLE4432 / SLE4442) 256 Byte EEPROM
Manufacturer
Siemens
Datasheet
1.SLE4442.pdf
(35 pages)
2.5
Reset and Answer-to-Reset (compare 2.2.1)
Power on Reset
After connecting the operating voltage to VCC, I/O is high impedance Z. By all means, a read
access to any address or an Answer-to-Reset must be carried out before data can be altered.
2.6
If RST is set to high during CLK in state L any operation is aborted and I/O is switched to high
impedance Z. Minimum duration of
Break the chip is ready for further operations.
2.7
Behavior in case of failures:
In case of one of the following failures, the chip sets the I/O to high impedance Z after 8 clock pulses
at the latest.
Possible failures:
2.8
Due to security purposes every chip is irreversibly coded by a scheme. By this way fraud and
misuse is excluded. The relevant data are programmed in the memory area from address 0 to 31.
Afterwards the associated protection bits are programmed. As an example, figures 12 and 13 show
ATR and Directory Data of Structure 1. When delivered, ATR header, ICM and ICT are
programmed. Siemens programs also the AID. The AID (Application IDentifier) consists of 5 byte
RID (Registered application provider IDentifier) administered by a national registration authority and
of up to 11 byte PIX (Proprietary application Identifier eXtension). There are two possibilities: the
customers AID or Siemens AID (only for sample quantities). Depending on the agreement between
the customer and Siemens ICCF can be also programmed before delivery.
Semiconductor Group
– Comparison unsuccessful
– Wrong command
– Wrong number of command clock pulses
– Write/erase access to already protected bytes
– Rewriting and erasing of a bit in the protection memory
Reset Modes
Break
Failures
Coding of the Chip
t
RES
= 5 s is necessary to trigger a defined valid reset. After
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SLE 4432
SLE 4442