SLE4442 Siemens, SLE4442 Datasheet - Page 12
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SLE4442
Manufacturer Part Number
SLE4442
Description
(SLE4432 / SLE4442) 256 Byte EEPROM
Manufacturer
Siemens
Datasheet
1.SLE4442.pdf
(35 pages)
2.2.1 Reset and Answer-to-Reset
Answer-to-Reset takes place according to ISO standard 7816-3 (ATR). The reset can be given at
any time during operation. In the beginning, the address counter is set to zero together with a clock
pulse and the first data bit (LSB) is output to I/O when RST is set from level H to level L. Under a
continuous input of additional 31 clock pulses the contents of the first 4 EEPROM addresses is read
out. The 33rd clock pulse switches I/O to high impedance Z and finishes the ATR procedure.
Answer-to-Reset
(Hex)
Figure 2
Reset and Answer-to-Reset
2.2.2 Operational Modes
Command Mode
After the Answer-to-Reset the chip waits for a command. Every command begins with a start
condition, includes a 3 bytes long command entry followed by an additional clock pulse and ends
with a stop condition.
After the reception of a command there are two possible modes:
Semiconductor Group
– Start condition: Falling edge on I/O during CLK in level H
– Stop condition: Rising edge on I/O during CLK in level H
– Outgoing data mode for reading
– Processing mode for writing and erasing
DO
Byte 1
7
… DO
0
DO
Byte 2
15
… DO
10
8
DO
23
Byte 3
… DO
16
DO
31
Byte 4
… DO
24
SLE 4432
SLE 4442