CDP1805 Intersil Corporation, CDP1805 Datasheet - Page 19
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CDP1805
Manufacturer Part Number
CDP1805
Description
CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer
Manufacturer
Intersil Corporation
Datasheet
1.CDP1805.pdf
(30 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CDP1805ACD
Manufacturer:
EON
Quantity:
17 600
DECIMAL SUBTRACT MEMORY
WITH BORROW, IMMEDIATE
BRANCH INSTRUCTIONS - SHORT BRANCH
SHORT BRANCH
NO SHORT BRANCH (See SKP)
SHORT BRANCH IF D = 0
SHORT BRANCH IF D NOT 0
SHORT BRANCH IF DF = 1
SHORT BRANCH IF POS OR ZERO
SHORT BRANCH IF EQUAL OR
GREATER
SHORT BRANCH IF DF = 0
SHORT BRANCH IF MINUS
SHORT BRANCH IF LESS
SHORT BRANCH IF Q = 1
SHORT BRANCH IF Q = 0
SHORT BRANCH IF EF1 = 1
(EF1 = V
SHORT BRANCH IF EF1 = 0
(EF1 = V
SHORT BRANCH IF EF2 = 1
(EF2 = V
SHORT BRANCH IF EF2 = 0
(EF2 = V
SHORT BRANCH IF EF3 = 1
(EF3 = V
SHORT BRANCH IF EF3 = 0
(EF3 = V
SHORT BRANCH IF EF4 = 1
(EF4 = V
SHORT BRANCH IF EF4 = 0
(EF4 = V
SHORT BRANCH ON COUNTER
INTERRUPT
SHORT BRANCH ON EXTERNAL
INTERRUPT
SS
DD
SS
DD
SS
DD
SS
DD
INSTRUCTION
)
)
)
)
)
)
)
)
TABLE 1. INSTRUCTION SUMMARY (SEE NOTES) (Continued)
MACHINE
CYCLES
NO. OF
4
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
3
CDP1805AC, CDP1806AC
MNEMONIC
DSBI
BNQ
NBR
BNZ
BGE
BDF
BPZ
BNF
BN1
BN2
BN3
BN4
BCI
BXI
BM
BQ
BR
BL
B1
B2
B3
B4
BZ
19
OP CODE
(Note 11)
(Note 11)
(Note 11)
(Note 11)
(Note 11)
(Note 11)
(Note 11)
(Note 12)
687F
683E
683F
3A
3B
3B
3B
3C
3D
3E
3F
30
38
32
33
33
33
31
39
34
35
36
37
D - M(R(P)) - (NOT DF)
R(P) + 1
DECIMAL ADJUST
M(R(P))
R(P) + 1
IF D = 0, M(R(P))
ELSE R(P) + 1
IF D NOT 0, M(R(P))
ELSE R(P) + 1
IF DF = 1, M(R(P))
ELSE R(P) + 1
IF DF = 1, M(R(P))
ELSE R(P) + 1
IF DF = 1, M(R(P))
ELSE R(P) + 1
IF D = 0, M(R(P))
ELSE R(P) + 1
IF D = 0, M(R(P))
ELSE R(P) + 1
IF D = 0, M(R(P))
ELSE R(P) + 1
IF Q = 1, M(R(P))
ELSE R(P) + 1
IF Q = 0, M(R(P))
ELSE R(P) + 1
IF EF1 = 1, M(R(P))
ELSE R(P) + 1
IF EF1 = 0, M(R(P))
ELSE R(P) + 1
IF EF2 = 1, M(R(P))
ELSE R(P) + 1
IF EF2 = 0, M(R(P))
ELSE R(P) + 1
IF EF3 = 1, M(R(P))
ELSE R(P) + 1
IF EF3 = 0, M(R(P))
ELSE R(P) + 1
IF EF4 = 1, M(R(P))
ELSE R(P) + 1
IF EF4 = 0, M(R(P))
ELSE R(P) + 1
IF CI = 1, M(R(P))
ELSE R(P) + 1
IF XI = 1, M(R(P))
ELSE R(P) + 1
R(P).0
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
R(P)
OPERATION
R(P).0
R(P).0,
R(P).0,
R(P).0,
R(P).0
R(P).0
R(P).0; 0
R(P).0
R(P).0
R(P).0
R(P).0,
DF, D
R(P).0
R(P).0
R(P).0
R(P).0
R(P).0
R(P).0
R(P).0
R(P).0
R(P).0
DF, D
CI