SAA5531 Philips Semiconductors, SAA5531 Datasheet - Page 55

• Manufacturer Part Number: SAA5531
• Description: Enhanced TV microcontrollers with On-Screen Display OSD
• Manufacturer: Philips Semiconductors

Philips Semiconductors
18.1.6.9
When a packet 27, designation code 0 is detected,
whether or not it is acquired, the TXT13.FASTEXT bit is
set. If the device is receiving 525-line teletext, a packet
X/0/27/0 is required to set the flag. The flag can be reset
by writing a logic 0 into the SFR bit.
When a packet 8/30 is detected, or a packet 4/30 when the
device is receiving a 525-line transmission, the
TXT13.PKT 8/30 is set. The flag can be reset by writing a
logic 0 into the SFR bit.
18.1.6.10 Broadcast Service Data Detection
When a packet 8/30 is detected, or a packet 4/30 when the
device is receiving a 525-line transmission, the
TXT13. PKT 8/30 flag is set. The flag can be reset by
writing a logic 0 into the SFR bit.
18.1.6.11 VPS acquisition
When the TXT0.VPS ON bit is set, any VPS data present
on line 16, field 0 of the CVBS signal at the input of the
teletext decoder is error checked and stored in row 25,
block 9 of the basic page memory. The device
automatically detects whether teletext or VPS is being
transmitted on this line and decodes the data
appropriately.
Each VPS byte in the memory consists of 4 biphase
decoded data bits (bits 0 to 3), a biphase error flag (bit 4)
and three logic 0s (bits 5 to 7).
The most significant bit of the VPS data cannot be set to
logic 1.
2000 Feb 23
handbook, full pagewidth
Enhanced TV microcontrollers with
On-Screen Display (OSD)
Fastext detection
row 25
column
0
teletext page
header data
9
10
byte 11
VPS
Fig.23 VPS data storage.
11
12
byte 12
VPS
13 14
55
byte 13
The TXT13.VPS RECEIVED bit is set by the hardware
whenever VPS data is acquired.
Full details of the VPS system can be found in the
specification “Domestic Video Program Delivery Control
System (PDC); EBU Tech. 3262-E”.
18.1.7
The family is capable of acquiring Level 1.5 625-line and
525-line World System Teletext.
18.1.8
The Wide Screen Signalling data transmitted on line 23
gives information on the aspect ratio and display position
of the transmitted picture, the position of subtitles and on
the camera/film mode. Some additional bits are reserved
for future use. A total of 14 data bits are transmitted.
All of the available data bits transmitted by the Wide
Screen Signalling signal are captured and stored in SFRs
WSS1, WSS2 and WSS3. The bits are stored as groups of
related bits and an error flag is provided for each group to
indicate when a transmission error has been detected in
one or more of the bits in the group.
Wide screen signalling data is only acquired when the
TXT8.WSS ON bit is set.
The TXT8.WSS RECEIVED bit is set by the hardware
whenever wide screen signalling data is acquired. The flag
can be reset by writing a logic 0 into the SFR bit.
VPS
15 16
byte 14
VPS
WST
WSS
17 18
ACQUISITION
ACQUISITION
byte 15
VPS
19 20
byte 4
VPS
21 22
byte 5
VPS
MBK964
Preliminary specification
23
SAA55xx