GS832272 ETC, GS832272 Datasheet - Page 16

• Manufacturer Part Number: GS832272
• Description: (GS832218 / GS832236 / GS832272) S/DCD Sync Burst SRAMs
• Manufacturer: ETC

Notes:
1.
2.
3.
Rev: 1.06 9/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
The diagram shows supported (tested) synchronous state transitions plus supported transitions that depend upon the use of G.
Use of “Dummy Reads” (Read Cycles with G High) may be used to make the transition from read cycles to write cycles without passing
through a Deselect cycle. Dummy Read cycles increment the address counter just like normal read cycles.
Transitions shown in grey tone assume G has been pulsed high long enough to turn the RAM’s drivers off and for incoming data to meet
Data Input Set Up Time.
X
X
CW
First Write
Burst Write
W
Simplified State Diagram with G
W
CW
16/41
W
CR
R
CR
R
Deselect
X
GS832218(B/E)/GS832236(B/E)/GS832272(C)
CW
W
CW
W
R
CR
First Read
Burst Read
R
R
CR
X
X
© 2001, GSI Technology
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