K4D263238E Samsung, K4D263238E Datasheet - Page 13

• Manufacturer Part Number: K4D263238E
• Description: 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL
• Manufacturer: Samsung

AC CHARACTERISTICS
*1.
CK cycle time
CK high level width
CK low level width
DQS out access time from CK
Output access time from CK
Data strobe edge to Dout edge
Read preamble
Read postamble
CK to valid DQS-in
DQS-In setup time
DQS-in hold time
DQS write postamble
DQS-In high level width
DQS-In low level width
Address and Control input setup
Address and Control input hold
DQ and DM setup time to DQS
DQ and DM hold time to DQS
Clock half period
Data Hold skew factor
Data output hold time from DQS
Jitter over 1~6 clock cycle error
Cycle to cyde duty cycle error
Rise and fall times of CK
K4D263238E-GC
Simplified Timing @ BL=2, CL=4
COMMAND
The cycle to cycle jitter over 1~6 cycle short term jitter.
CK, CK
DQS
CS
DM
DQ
Parameter
READA
0
CL=3
CL=4
CL=5
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CK
CH
CL
DQSCK
AC
DQSQ
RPRE
RPST
DQSS
WPRES
WPREH
WPST
DQSH
DQSL
IS
IH
DS
DH
HP
QHS
QH
J
DCERR
R
*
, t
1
1
1
F
tCHmin
tCLmin
-0.55
-0.55
t
tHP-
Min
0.45
0.45
0.85
0.35
0.45
0.45
0.35
0.35
QHS
2.5
0.9
0.4
0.4
0.8
0.8
or
0
-
-
-
-
-
-
-
-25
2
Max
0.55
0.55
0.55
0.55
0.35
1.15
0.55
0.55
600
1.1
0.6
0.6
0.4
75
75
4
-
-
-
-
-
-
-
-
tCLmin
tCHmin
-0.55
-0.55
t
tHP-
Min
2.86
0.45
0.45
0.85
0.35
0.45
0.45
0.35
0.35
QHS
0.9
0.4
0.4
0.8
0.8
tCH
or
0
-
-
-
-
-
-
-
tCK
-2A
3
Max
0.55
0.55
0.55
0.55
0.35
1.15
0.55
0.55
600
tCL
1.1
0.6
0.6
0.4
75
75
tRPRE
4
-
-
-
-
-
-
-
-
- 13 -
tCHmin
tCLmin
tAC
-0.55
-0.55
t
Min
0.45
0.45
0.85
0.35
0.45
0.45
0.35
0.35
tHP-
QHS
3.3
0.9
0.4
0.4
0.8
0.8
or
0
-
-
-
-
-
-
-33
4
tDQSCK
Max
0.55
0.55
0.55
0.55
0.35
1.15
0.55
0.55
700
Qa1
1.1
0.6
0.6
0.4
10
85
85
-
-
-
-
-
-
-
-
tDQSQ
tCHmin
tCLmin
t
Qa2
Min
0.45
0.45
0.85
0.35
0.45
0.45
0.40
0.40
tHP-
tRPST
-0.6
-0.6
3.6
0.9
0.4
0.4
0.9
0.9
QHS
or
0
-
-
-
-
-
-
-36
5
Max
0.55
0.55
0.40
1.15
0.55
0.55
0.45
700
0.6
0.6
1.1
0.6
0.6
10
95
95
-
-
-
-
-
-
-
-
tIS
tIH
tCHmin
tCLmin
t
Min
0.45
0.45
0.35
0.45
0.45
0.40
0.40
tHP-
-0.6
-0.6
WRITEB
128M GDDR SDRAM
4.0
0.9
0.4
0.8
0.4
0.9
0.9
QHS
or
0.
-
-
-
-
-
-
6
-40
t
WPRES
Max
0.55
0.55
0.40
0.55
0.55
0.45
-0.6
100
100
700
0.6
1.1
0.6
1.2
0.6
10
-
-
-
-
-
-
-
-
tDQSS
Rev 1.7 (Nov. 2003)
t
WPREH
tCHmin
tCLmin
t
Min
0.45
0.45
0.45
0.45
0.45
0.45
tHP-
-0.7
-0.7
4.5
0.9
0.4
0.8
0.3
0.4
1.0
1.0
QHS
or
0.
-
-
-
-
-
-
7
tDS tDH
-45
Db0
Max
0.55
0.55
0.45
0.55
0.55
105
105
700
tDQSH
0.7
0.7
1.1
0.6
1.2
0.6
0.5
10
-
-
-
-
-
-
-
-
Db1
Unit Note
tDQSL
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ps
ps
ps
8
1
1
1