LRS1341 Sharp, LRS1341 Datasheet - Page 21
LRS1341
Manufacturer Part Number
LRS1341
Description
Stacked Chip 16M Flash Memory and 2M SRAM
Manufacturer
Sharp
Datasheet
1.LRS1341.pdf
(24 pages)
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Part Number
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Stacked Chip (16M Flash & 2M SRAM)
SRAM DATA RETENTION CHARACTERISTICS
NOTES:
1. Reference value at T
2. S-CE
Data Sheet
Data Retention Supply Voltage
Data Retention Supply Current
Chip Enable Setup Time
Chip Enable Hold Time
NOTE: To control the data retention mode at S-CE
T
A
S-V
S-V
S-CE
S-CE
= -25°C to +85°C
1
CC
V
CC
≥ V
PARAMETER
CCDR
2
1
CC
and V
- 0.2 V, S-CE
V
V
CCDR
2.7 V
0.6 V
CCDR
2.7 V
2.2 V
A
CCDR
0 V
0 V
= 25°C, S-V
- 0.2 V, or 0 V and 0.2 V, and during the data retention mode.
Figure 13. Data Retention Timing Diagram (S-CE
Figure 14. Data Retention Timing Diagram (S-CE
2
≥ V
CC
CC
- 0.2 V (S-CE
SYMBOL
V
= 3.0 V.
I
CCDR
t
CCDR
CDR
t
t
R
CDR
t
CDR
1
1
S-CE
S-CE
V
S-CE
controlled) or S-CE
, fix the input level of S-CE
CCDR
2
1
1
≤ 0.2 V or
≥ V
≥ V
= 3V, S-CE
Data Retention Mode
S-CE
Data Retention Mode
CONDITIONS
CCDR
CCDR
S-CE
1
≥ V
2
- 0.2 V
- 0.2 V
≤ 0.2 V
2
CCDR
≤ 0.2 V (S-CE
2
≤ 0.2 V or
- 0.2 V
2
between
2
controlled).
1
2
MIN.
2.0
Controlled)
Controlled)
0
5
t
R
t
R
TYP.
1
MAX.
3.6
35
LRS1341/LRS1342
UNIT
ms
µA
ns
V
LRS1342-12
LRS1342-13
NOTES
2
2
21