ispPAC-CLK55xx Lattice Semiconductor, ispPAC-CLK55xx Datasheet - Page 10
![no-image](/images/manufacturer_photos/0/3/381/lattice_semiconductor_sml.jpg)
ispPAC-CLK55xx
Manufacturer Part Number
ispPAC-CLK55xx
Description
In-System Programmable Clock Generator with Universal Fan-Out Buffer
Manufacturer
Lattice Semiconductor
Datasheet
1.ISPPAC-CLK55XX.pdf
(43 pages)
Lattice Semiconductor
Performance Characteristics – PLL
f
t
t
t
t
M
N
f
f
V
f
t
t
DC
t
t
PSR
1. In PLL Bypass mode (PLL_BYPASS = HIGH), output will support frequencies down to 0Hz (divider chain is a fully static design).
2. Dividers should be set so that they provide the phase detector with signals of 10MHz or greater for loop stability.
3. f
4. Variation in duty cycle expressed in ps. To obtain duty cycle percentage error (%
5. See Figures 3-5 for output loads.
REF
CLOCKHI,
CLOCKLO
RINP,
FINP
PFD
VCO
OUT
JIT
JIT
CO_BYPASS
L
DIV
DIV
DIV
Symbol
f
ERR
IN
OUT
(cc)
(per)
= f
x DC
OUT
= 100 MHz, M = N = 1, V = 6, output type LVTTL, fastest slew rate, 50Ω output impedance.
ERR.
Reference input frequency
range
Reference input clock HIGH and
LOW times
Input rise and fall times
M-divider range
N-Divider range
Phase detector input frequency
range
VCO operating frequency
Output Divider range
Output frequency range
Output adjacent-cycle jitter
Output period jitter
Output duty cycle error (see
Table 3 for nominal values)
Reference clock to output delay,
PLL bypass mode
PLL Lock time
Power supply rejection, period
jitter vs. power supply noise
2
Parameter
1
4
Measured between 20% and 80%
levels
Even integer values only
Fine Skew Mode,
f
Coarse Skew Mode,
f
1000 cycle sample
Note 3
Output type LVDS, V
Output type LVCMOS 3.3V
f
Inputs and Outputs configured to
LVCMOS 3.3V standard
From Power-up event
From Reset event
f
VCCA = VCCD = VCCO modulated
with 100kHz sinusoidal stimulus
VCO
VCO
OUT
IN
= f
= 640MHz
< 100 MHz
= 640MHz
OUT
= 100MHz
Conditions
10
3
CCO
= 3.3V
ERR
5
) for a given output frequency (f
5
ispClock5500 Family Data Sheet
Min.
1.25
320
10
10
10
—
—
—
—
—
—
—
—
—
1
1
2
5
Typ.
0.05
150
55
11
15
—
—
—
—
—
—
—
—
—
—
—
—
5
Max.
320
320
640
320
160
260
300
500
32
32
64
70
14
50
—
—
—
OUT
5
), %
ERR
ps (RMS)
ps(RMS)
mV(p-p)
ps (p-p)
Units
MHz
MHz
MHz
MHz
MHz
= 100 x
ns
ns
ps
ps
ns
µs
µs