EP7309-CR-C Cirrus Logic, EP7309-CR-C Datasheet - Page 16

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EP7309-CR-C

Manufacturer Part Number
EP7309-CR-C
Description
HIGH PERFORMANCE LOW POWER SYSTEM ON CHIP ENHANCED DIGITAL AUDIO INTERFACE
Manufacturer
Cirrus Logic
Datasheet
EP7309
High-Performance, Low-Power System on Chip
Static Memory Burst Write Cycle
16
EXPRDY
EXPCLK
WRITE
WORD
WORD
nMWE
nMOE
HALF
nCS
A
D
Note:
1. Four cycles are shown in the above diagram (minimum wait states, 1-1-1-1). This is the maximum number of consecutive
2. The cycle time can be extended by integer multiples of the clock period (27 ns at 36 MHz, 54 ns at 18.432 MHz, and
3. Zero wait states for sequential writes is not permitted for memory devices which use nMWE pin, as this cannot be driven with
cycles that can be driven. The number of consecutive cycles can be programmed from 2 to 4, inclusively.
77 ns at 13 MHz), by either driving EXPRDY low and/or by programming a number of wait states. EXPRDY is sampled on
the falling edge of EXPCLK before the data transfer. If low at this point, the transfer is delayed by one clock period where
EXPRDY is sampled again. EXPCLK need not be referenced when driving EXPRDY, but is shown for clarity.
valid timing under zero wait state conditions.
t
t
HWd
WDd
t
EXs
t
MWd
t
t
t
CSd
Ad
Dv
Figure 5. Static Memory Burst Write Cycle Timing Measurement
Copyright 2001 Cirrus Logic (All Rights Reserved)
t
Dnv
t
EXh
t
Ah
t
MWh
t
t
MWd
Dv
t
Dnv
t
Ah
t
MWh
t
t
MWd
Dv
t
Dnv
t
Ah
t
MWh
t
t
MWd
Dv
t
MWh
DS507PP1
t
CSh

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