M306V5EESP Mitsubishi, M306V5EESP Datasheet - Page 29

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M306V5EESP

Manufacturer Part Number
M306V5EESP
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
Manufacturer
Mitsubishi
Datasheet
Rev. 1.0
The following paragraphs describes the clocks generated by the clock generating circuit.
(1) Main clock
(2) BCLK
(3) Peripheral function clock (f
The main clock is generated by the main clock oscillation circuit. After a reset, the clock is divided by
8 to the BCLK. The clock can be stopped using the main clock stop bit (bit 5 at address 0006
After the oscillation of the main clock oscillation circuit has stabilized, the drive capacity of the main
clock oscillation circuit can be reduced using the X
0007
tion. This bit changes to “1” when shifting from high-speed/medium-speed mode to stop mode and at
a reset.
The internal clock
clock by 1, 2, 4, 8, or 16. The BCLK is derived by dividing the main clock by 8 after a reset.
The main clock division select bit 0 (bit 6 at address 0006
speed/medium-speed to stop mode and at reset.
The clock for the peripheral devices is derived by dividing the main clock by 1, 8 or 32. The peripheral
function clock is stopped by stopping the main clock or by setting the WAIT peripheral function clock
stop bit (bit 2 at 0006
16
). Reducing the drive capacity of the main clock oscillation circuit reduces the power dissipa-
16
is the clock that drives the CPU, and is the clock derived by dividing the main
) to “1” and then executing a WAIT instruction.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
1,
f
8,
f
32,
f
1SIO2
, f
8SIO2
IN
, f
-X
32SIO2,
OUT
16
drive capacity select bit (bit 5 at address
) changes to “1” when shifting from high-
f
AD
and ON-SCREEN DISPLAY CONTROLLER
)
MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
16
).
29

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