M306V2 Mitsubishi, M306V2 Datasheet - Page 140

• Manufacturer Part Number: M306V2
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
• Manufacturer: Mitsubishi

140
(6) I
The I
4, 6, 7 can be read out and written to.
This bit stores the last bit value of received data and can also be used for ACK receive confirmation. If
ACK is returned when an ACK clock occurs, the LRB bit is set to “0.” If ACK is not returned, this bit is
set to “1.” Except in the ACK mode, the last bit value of received data is input. The state of this bit is
changed from “1” to “0” by executing a write instruction to the I
buffer register.
This bit is set to “1” when a general call whose address data is all “0” is received in the slave mode.
By a general call of the master device, every slave device receives control data after the general call.
The AD0 bit is set to “0” by detecting the STOP condition or START condition.
This flag indicates a comparison result of address data.
<<In the slave receive mode, when the 7-bit addressing format is selected, this bit is set to “1” in one
<<In the slave reception mode, when the 10-bit addressing format is selected, this bit is set to “1” with
<<The state of this bit is changed from “1” to “0” by executing a write instruction to the I
n the master transmission mode, when a device other than the microcomputer sets the SDA to “L,”,
arbitration is judged to have been lost, so that this bit is set to “1.” At the same time, the TRX bit is set
to “0,” so that immediately after transmission of the byte whose arbitration was lost is completed, the
MST bit is set to “0.” When arbitration is lost during slave address transmission, the TRX bit is set to “0”
and the reception mode is set. Consequently, it becomes possible to receive and recognize its own
slave address transmitted by another master device.
Bit 0: last receive bit (LRB)
Bit 1: general call detecting flag (AD0)
Bit 2: slave address comparison flag (AAS)
Bit 3: arbitration lost detecting flag (AL)
2
of the following conditions.>>
• The address data immediately after occurrence of a START condition matches the slave address
• A general call is received.
the following condition.>>
• When the address data is compared with the I
register or the I
Ci status register (i = 0, 1)
stored in the high-order 7 bits of the I
and RBW), the first bytes match.
General call: The master transmits the general call address “00
Arbitration lost: The status in which communication as a master is disabled.
2
Ci status register controls the I
2
Ci transmit buffer register.>>
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
2
C-BUS interface i status. Bits 0 to 3, 5 are read-only bits and bits
2
Ci address register.
2
Ci address register (8 bits consists of slave address
2
Ci data shift register or the I
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
16
” to all slaves.
M306V2ME-XXXFP
M306V2EEFP
2
Ci data shift
2
Ci transmit
Rev. 1.0