LPC2106 Philips Semiconductors, LPC2106 Datasheet - Page 13

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LPC2106

Manufacturer Part Number
LPC2106
Description
Single-chip 32-bit microcontrollers; 128 kB ISP/IAP Flash with 64 kB/32 kB/16 kB RAM
Manufacturer
Philips Semiconductors
Datasheet

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Product data
6.6 Pin connect block
6.7 Pin function select register 0 (PINSEL0 - 0xE002C000)
Table 4:
The pin connect block allows selected pins of the microcontroller to have more than
one function. Configuration registers control the multiplexers to allow connection
between the pin and the on chip peripherals. Peripherals should be connected to the
appropriate pins prior to being activated, and prior to any related interrupt(s) being
enabled. Activity of any enabled peripheral function that is not mapped to a related
pin should be considered undefined.
The Pin Control Module contains two registers as shown in
Table 5:
The PINSEL0 register controls the functions of the pins as per the settings listed in
Table
function is selected for a pin. For other functions, direction is controlled automatically.
Settings other than those shown in
Table 6:
Block
System Control External Interrupt 0 (EINT0)
System Control External Interrupt 1 (EINT1)
System Control External Interrupt 2 (EINT2)
Address
0xE002C000
0xE002C004
PINSEL0
1:0
3:2
5:4
7:6
9:8
6. The direction control bit in the IODIR register is effective only when the GPIO
Interrupt sources
Pin function select register 0 (PINSEL0 - 0xE002C000)
Pin name
P0.0
P0.1
P0.2
P0.3
P0.4
Flag(s)
Rev. 04 — 05 February 2004
Name
PINSEL0
PINSEL1
Value
0
0
1
0
0
1
0
0
1
0
0
1
0
0
1
…continued
0
1
0
0
1
0
0
1
0
0
1
0
0
1
0
Table 6
Description
Pin function select register 0
Pin function select register 1
Function
GPIO Port 0.0
TxD (UART 0)
PWM1
GPIO Port 0.1
RxD (UART 0)
PWM3
GPIO Port 0.2
SCL (I
Capture 0.0 (Timer 0)
GPIO Port 0.3
SDA (I
Match 0.0 (Timer 0)
GPIO Port 0.4
SCK (SPI)
Capture 0.1 (Timer 0)
LPC2104/2105/2106
are reserved, and should not be used
2
Single-chip 32-bit microcontrollers
2
C)
C)
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table
Value after Reset
0
0
0
0
0
5.
Access
Read/Write
Read/Write
VIC channel #
14
15
16
13 of 32

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