LPC2106 Philips Semiconductors, LPC2106 Datasheet
LPC2106
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LPC2106 Summary of contents
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General description The LPC2104, 2105 and 2106 are based on a 16/32 bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, together with 128 kbytes (kB) of embedded high speed flash memory. A 128 bit wide memory interface ...
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... Ordering options Table 2: Type number LPC2104BBD48 LPC2105BBD48 LPC2106BBD48 LPC2106FHN48 9397 750 12792 Product data 60 MHz maximum CPU clock available from programmable on-chip Phase-Locked Loop. On-chip crystal oscillator with an operating range of 1 MHz to 30 MHz. Two low power modes, Idle and Power-down. ...
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... Philips Semiconductors 4. Block diagram ARM7 LOCAL BUS INTERNAL SRAM CONTROLLER 16/32/64 kB SRAM EINT0* EINT1* EXTERNAL INTERRUPTS EINT2* CAP0..2* CAPTURE/ COMPARE MAT0..2* CAP0..3* CAPTURE/ COMPARE MAT0..3* GPIO (32 PINS) GENERAL PURPOSE I/O PWM1..6* REAL TIME *Shared with GPIO (1) When test/debug interface is used, GPIO/other function sharing these pins are not available. ...
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... Philips Semiconductors 5. Pinning information 5.1 Pinning handbook, full pagewidth P0.19/MAT1.2/TCK 1 P0.20/MAT1.3/TDI 2 P0.21/PWM5/TDO DD1.8 (CORE) 5 RST 6 V SS1 7 P0.27/TRACEPKT0/TRST 8 P0.28/TRACEPKT1/TMS 9 P0.29/TRACEPKT2/TCK Fig 2. Pinning. 9397 750 12792 Product data LPC2104/2105/2106 LPC2104/2105/2106 Rev. 04 — 05 February 2004 Single-chip 32-bit microcontrollers 36 P0 ...
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... Philips Semiconductors 5.2 Pin description Table 3: Pin description Symbol Pin P0.0 to P0.31 13, 14, 18, 21-24, 28-30, 35-37, 41, 44-48, 1-3, 32-34, 38, 39, 8-10, 15 9397 750 12792 Product data Type Description I/O Port 0: Port 32-bit bi-directional I/O port with individual direction controls for each bit. The operation of port 0 pins depends upon the pin function selected via the Pin Connect Block ...
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... Philips Semiconductors Table 3: Pin description …continued Symbol Pin 9397 750 12792 Product data Type Description I/O P0.9 — Port 0 bit 9. I RxD1 — Receiver input for UART 1. O PWM6 — Pulse Width Modulator output 6. I/O P0.10 — Port 0 bit 10. ...
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... Philips Semiconductors Table 3: Pin description …continued Symbol Pin RTCK 26 DBGSEL 27 RST 19, 31, 43 SS1 SS4 V 5 DD1.8 V 17, 40 DD3 NC 4, 20, 25, 42 9397 750 12792 Product data Type Description I/O P0.23 — Port 0 bit 23. O PIPESTAT0 — Pipeline Status, bit 0. Standard I/O port with internal pull-up. ...
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... On-Chip static RAM On-Chip static RAM may be used for code and/or data storage. The SRAM may be accessed as 8-bits, 16-bits, and 32-bits. The LPC2104 provides static RAM, the LPC2105 provides static RAM, and the LPC2106 provides static RAM. 9397 750 12792 Product data The standard 32-bit ARM set ...
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... Philips Semiconductors 6.4 Memory map The LPC2104, LPC2105 and LPC2106 memory maps incorporate several distinct regions, as shown in the following figures. In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either Flash memory (the default) or on-chip static RAM. This is described in 6.17 “System Fig 3. LPC2104 memory map. ...
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... Philips Semiconductors Fig 4. LPC2105 memory map. 9397 750 12792 Product data LPC2104/2105/2106 4.0 GB AHB PERIPHERALS 3.75 GB VPB PERIPHERALS 3.5 GB 3.0 GB RESERVED ADDRESS SPACE 2.0 GB BOOT BLOCK (RE-MAPPED FROM ON-CHIP FLASH MEMORY RESERVED ADDRESS SPACE 32 KBYTE ON-CHIP STATIC RAM 1.0 GB RESERVED ADDRESS SPACE 128 KBYTE ON-CHIP FLASH MEMORY 0.0 GB Rev. 04 — ...
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... Philips Semiconductors Fig 5. LPC2106 memory map. 6.5 Interrupt controller The Vectored Interrupt Controller (VIC) accepts all of the interrupt request inputs and categorizes, them as FIQ, vectored IRQ, and non-vectored IRQ as defined by programmable settings. The programmable assignment scheme means that priorities of interrupts from the various peripherals can be dynamically assigned and adjusted. ...
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... Philips Semiconductors Vectored IRQs have the middle priority. Sixteen of the interrupt requests can be assigned to this category. Any of the interrupt requests can be assigned to any of the 16 vectored IRQ slots, among which slot 0 has the highest priority and slot 15 has the lowest. Non-vectored IRQs have the lowest priority. ...
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... Philips Semiconductors Table 4: Block System Control External Interrupt 0 (EINT0) System Control External Interrupt 1 (EINT1) System Control External Interrupt 2 (EINT2) 6.6 Pin connect block The pin connect block allows selected pins of the microcontroller to have more than one function. Configuration registers control the multiplexers to allow connection between the pin and the on chip peripherals ...
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... Philips Semiconductors Table 6: PINSEL0 11:10 13:12 15:14 17:16 19:18 21:20 23:22 25:24 27:26 29:28 31:30 6.8 Pin function select register 1 (PINSEL1 - 0xE002C004) The PINSEL1 register controls the functions of the pins as per the settings listed in Table function is selected for a pin. For other functions direction is controlled automatically. Function control for the pins P0.17 - P0.31 is effective only when the DBGSEL input is pulled LOW during RESET ...
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... Philips Semiconductors Table 7: PINSEL1 1:0 3:2 5:4 7:6 9:8 11:10 13:12 15:14 17:16 19:18 21:20 23:22 25:24 27:26 29:28 31:30 6.9 General purpose parallel I/O Device pins that are not connected to a specific peripheral function are controlled by the GPIO registers. Pins may be dynamically configured as inputs or outputs. Separate registers allow setting or clearing any number of outputs simultaneously. The value of the output register may be read back, as well as the current state of the port pins ...
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... Transmitters and/or receivers can operate in either master or slave mode, depending on whether the chip has to initiate a data transfer or is only addressed. I multi-master bus, it can be controlled by more than one bus master connected to it implemented in LPC2104, LPC2105 and LPC2106 supports bit rate up to 400 kbit/s (Fast I 6.11.1 Features • • ...
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... Philips Semiconductors 6.12 SPI serial I/O controller The SPI is a full duplex serial interface, designed to be able to handle multiple masters and slaves connected to a given bus. Only a single master and a single slave can communicate on the interface during a given data transfer. During a data transfer the master always sends a byte of data to the slave, and the slave always sends a byte of data to the master ...
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... The PWM is based on the standard Timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2104, LPC2105 and LPC2106. The Timer is designed to count cycles of the peripheral clock (PCLK) and optionally generate interrupts or perform other actions when specified timer values occur, based on seven match registers ...
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... Philips Semiconductors edge controlled PWM outputs require only one match register each, since the repetition rate is the same for all PWM outputs. Multiple single edge controlled PWM outputs will all have a rising edge at the beginning of each PWM cycle, when an MR0 match occurs. ...
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... PLL to Lock, then connect to the PLL as a clock source. 6.17.3 Reset and wake-up timer Reset has two sources on the LPC2104, LPC2105 and LPC2106: the RST pin and Watchdog Reset. The RST pin is a Schmitt trigger input pin with an additional glitch filter. Assertion of chip Reset by any source starts the Wake-up Timer (see Wake-up Timer description below), causing the internal chip reset to remain asserted until the external Reset is de-asserted, the oscillator is running, a fi ...
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... A trace port allows tracing program execution. Each of these functions requires a trade-off of debugging features versus device pins. Because the LPC2104, LPC2105 and LPC2106 are provided in a small package, there is no room for permanently assigned JTAG or Trace pins. An alternate JTAG port allows an option to debug functions assigned to the pins used by the primary JTAG port ...
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... It communicates with the host using the DCC (Debug Communications Channel), which is present in the EmbeddedICE logic. The LPC2104, LPC2105 and LPC2106 contain a specific configuration of RealMonitor software programmed into the on-chip Flash memory. 9397 750 12792 ...
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... Philips Semiconductors 7. Limiting values Table 8: In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V DD1.8 V DD3 stg P [1] [2] [3] [4] [5] [6] 9397 750 12792 Product data Limiting values Supply voltage, internal rail Supply voltage, external rail ...
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... Philips Semiconductors 8. Static characteristics Table 9: Static characteristics for commercial, unless otherwise specified. amb Symbol Parameter V Supply voltage DD1.8 V External rail supply voltage DD3 Standard Port pins, RST, RTCK, and DBGSEL I LOW level input current pull-up I HIGH level input current, no ...
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... Philips Semiconductors Table 9: Static characteristics for commercial, unless otherwise specified. amb Symbol Parameter I Input leakage to V lkg SS Oscillator pins X1 input Voltages X2 output Voltages [1] Typical ratings are not guaranteed. The values listed are at room temperature (+25 ˚C), nominal supply voltages. ...
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... Philips Semiconductors 9. Dynamic characteristics Table 10: Characteristics for commercial +85 C for industrial, V amb Symbol Parameter External Clock f Oscillator frequency supplied by an osc external oscillator (signal generator) External clock frequency supplied by an external crystal oscillator External clock frequency if on-chip ...
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... Philips Semiconductors 9.1 Timing Fig 6. External clock timing. 9397 750 12792 Product data 0 0.9 0 0 CHCL Rev. 04 — 05 February 2004 LPC2104/2105/2106 Single-chip 32-bit microcontrollers t CHCX t CLCX t CLCH t C 002aaa416 © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...
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... Philips Semiconductors 10. Package outline LQFP48: plastic low profile quad flat package; 48 leads; body 1 pin 1 index DIMENSIONS (mm are the original dimensions) A UNIT max. 0.20 1.45 mm 1.6 0.25 0.05 1.35 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...
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... Philips Semiconductors HVQFN48: plastic thermal enhanced very thin quad flat package; no leads; 48 terminals; body 0.85 mm terminal 1 index area terminal 1 48 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... Philips Semiconductors 11. Revision history Table 11: Revision history Rev Date CPCN Description 04 20040205 - Product data (9397 750 12792); 853-2425 ECN 01-A15458f of 28 January 2004 Modifications: • • • • 03 20031007 - Product data (9397 750 12142); ECN 853-2425 30389 of 30 September 2003 ...
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... Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. ...
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... Philips Semiconductors Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.1 Key features . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 Functional description . . . . . . . . . . . . . . . . . . . 8 6.1 Architectural overview 6.2 On-Chip Flash program memory . . . . . . . . . . . 8 6.3 On-Chip static RAM . . . . . . . . . . . . . . . . . . . . . 8 6.4 Memory map 6.5 Interrupt controller . . . . . . . . . . . . . . . . . . . . . 11 6.5.1 Interrupt sources ...