L6918A STMicroelectronics, L6918A Datasheet - Page 11

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L6918A

Manufacturer Part Number
L6918A
Description
5 BIT PROGRAMMABLE MULTIPHASE CONTROLLER
Manufacturer
STMicroelectronics
Datasheet
Connections between the devices are shown in figure 1.
OSCILLATOR
The devices have been designed in order to operate on each phase at the same switching frequency of the in-
ternal oscillator. So, input and output resulting frequencies are four times bigger.
The oscillator is present in all the devices. Since the Master oscillator sets the main frequency for the regulation,
the Slave oscillator gives an offset to the Slave's PLL. In this way the PLL is able to lock the synchronization
signal that enters from its SYNC_IN pin; it is able to recover up to ±15% offset in the synchronization signal fre-
quency. It is then necessary to program the switching frequency for all the devices involved in the multi-phase
conversion as follow.
The switching frequency is internally fixed to 300kHz. The internal oscillator generates the triangular waveform
for the PWM charging and discharging with a constant current an internal capacitor. The current delivered to the
oscillator is typically 25 A (Fsw = 300KHz) and may be varied using an external resistor (R
tween OSC pin and GND or Vcc. Since the OSC pin is maintained at fixed voltage (typ. 1.235V), the frequency
is varied proportionally to the current sunk (forced) from (into) the pin considering the internal gain of 12KHz/ A.
In particular connecting it to GND the frequency is increased (current is sunk from the pin), while connecting
ROSC to Vcc=12V the frequency is reduced (current is forced into the pin), according to the following relation-
ships:
Note that forcing a 25 A current into this pin, the device stops switching because no current is delivered to the
oscillator.
Figure 2 shows the frequency variation vs. the oscillator resistor ROSC considering the above reported relation-
ships.
– Clock Signal (SYNC_IN / SYNC_OUT pins): Unidirectional line.
– SLAVE_OK Bus (SLAVE_OK pins): Bi-directional line.
– PGOOD pins:
A synchronization signal exits from the Master device through the SYNC_OUT pin with 90 deg phase-
shift and enters the Slave device through the SYNC_IN pin. The Slave device locks that signal
through an internal PLL for its regulation. An auxiliary synchronization signal exits from the Slave
through the SYNC_OUT.
While the supply voltages are increasing, this line is hold to GND by all the devices. The Slave device
sets this line free (internally 5V pulled-up) when it is ready for the Soft-Start. After that this line is
freed, the Master device starts the Soft Start (for further details about Soft-Start, see the relevant sec-
tion).
During normal operation, the line is pulled low by the Slave device if an Over / Under voltage is de-
tected (See relevant section).
PGOOD pins are connected together and pulled-up. During Soft-Start, the master device hold down
this line while during normal regulation the slave device de-assert the line if PGOOD has been lost.
R
R
OSC
OSC
vs. 12V:
vs. GND:
f
S
f
S
=
=
300kHz
300kHz
+
+
----------------------------- 12
R
12 1.237
----------------------------- 12
R
O SC
O SC
1.237
K
K
KHz
----------- -
KHz
----------- -
A
A
=
=
300KHz
300KHz
+
------------------------------- -
12.918 10
R
-----------------------------
R
14.82 10
OSC
OS C
K
K
7
6
OSC
L6918 L6918A
) connected be-
11/35

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