HIP6005BCB Intersil Corporation, HIP6005BCB Datasheet - Page 7

• Manufacturer Part Number: HIP6005BCB
• Description: Buck Pulse-Width Modulator (PWM) Controller and Output Voltage Monitor
• Manufacturer: Intersil Corporation

Figure 5 shows the critical power components of the converter.
To minimize the voltage overshoot the interconnecting wires
indicated by heavy lines should be part of ground or power
plane in a printed circuit board. The components shown in
Figure 6 should be located as close together as possible.
Please note that the capacitors C
numerous physical capacitors. Locate the HIP6005B within 3
inches of the MOSFET, Q
MOSFET’s gate and source connections from the HIP6005B
must be sized to handle up to 1A peak current.
Figure 6 shows the circuit traces that require additional
layout consideration. Use single point and ground plane
construction for the circuits shown. Minimize any leakage
current paths on the SS PIN and locate the capacitor, C
close to the SS pin because the internal current source is
only 10 A. Provide local V
GND pins. Locate the capacitor, C
to the BOOT and PHASE pins.
Feedback Compensation
Figure 7 highlights the voltage-mode control loop for a buck
converter. The output voltage (V
Reference voltage level. The error amplifier (Error Amp)
output (V
triangular wave to provide a pulse-width modulated (PWM)
wave with an amplitude of V
PWM wave is smoothed by the output filter (L
FIGURE 5. PRINTED CIRCUIT BOARD POWER AND GROUND
C
FIGURE 6. PRINTED CIRCUIT BOARD SMALL SIGNAL
SS
HIP6005B
SS
HIP6005B
E/A
PHASE
UGATE
GND
) is compared with the oscillator (OSC)
PLANES OR ISLANDS
LAYOUT GUIDELINES
BOOT
PHASE
V
C
CC
BOOT
1
2-116
. The circuit traces for the
+12V
CC
V
Q
RETURN
D
IN
IN
1
2
decoupling between V
C
at the PHASE node. The
D
VCC
IN
OUT
1
BOOT
C
and C
IN
) is regulated to the
+V
L
IN
as close as practical
O
Q
O
D
1
each represent
2
C
O
V
L
O
OUT
O
C
and C
O
CC
O
V
).
ss
OUT
and
HIP6005B
The modulator transfer function is the small-signal transfer
function of V
Gain and the output filter (L
break frequency at F
the modulator is simply the input voltage (V
peak-to-peak oscillator voltage V
Modulator Break Frequency Equations
The compensation network consists of the error amplifier
(internal to the HIP6005B) and the impedance networks Z
and Z
closed loop transfer function with the highest 0dB crossing
frequency (f
the difference between the closed loop phase at f
degrees The equations below relate the compensation
network’s poles, zeros and gain to the components (R
R
locating the poles and zeros of the compensation network:
F
1. Pick Gain (R
2. Place 1
3. Place 2
4. Place 1
5. Place 2
6. Check Gain against Error Amplifier’s Open-Loop Gain.
7. Estimate Phase Margin - Repeat if Necessary.
LC
V
3
OSC
FIGURE 7. VOLTAGE-MODE BUCK CONVERTER
, C
=
FB
1
OSC
----------------------------------------- -
2 x
, C
. The goal of the compensation network is to provide a
2
, and C
COMPARATOR
ERROR
ST
0dB
ND
ST
ND
V
L
OUT
1
PWM
E/A
COMPENSATION DESIGN
O
AMP
Zero Below Filter’s Double Pole (~75% F
) and adequate phase margin. Phase margin is
Pole at the ESR Zero.
Zero at Filter’s Double Pole.
Pole at Half the Switching Frequency.
x C
+
-
Z
2
/V
FB
3
/R
HIP6005B
+
) in Figure 8. Use these guidelines for
E/A
-
O
DETAILED COMPENSATION COMPONENTS
1
LC
) for desired converter bandwidth.
REFERENCE
. This function is dominated by a DC
COMP
DRIVER
and a zero at F
C
1
Z
O
F
IN
C
DACOUT
ESR
+
-
and C
2
R
2
=
OSC
V
----------------------------------------------- -
2 x (ESR x C
IN
O
PHASE
), with a double pole
.
ESR
(PARASITIC)
Z
FB
L
O
FB
IN
1
C
. The DC Gain of
3
) divided by the
Z
ESR
IN
0dB
R
C
1
O
R
O
3
)
and 180
1
V
, R
OUT
LC
V
IN
2
).
OUT
,