HIP6005BCB Intersil Corporation, HIP6005BCB Datasheet - Page 6

• Manufacturer Part Number: HIP6005BCB
• Description: Buck Pulse-Width Modulator (PWM) Controller and Output Voltage Monitor
• Manufacturer: Intersil Corporation

The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R
programs the over-current trip level. An internal 200 A current
V
referenced to V
over-current function initiates a soft-start sequence. The soft-
start function discharges C
inhibits PWM operation. The soft-start function recharges
C
clamped to the SS voltage. Should an overload occur while
recharging C
while fully charging C
shows this operation with an overload condition. Note that the
inductor current increases to over 15A during the C
charging interval and causes an over-current trip. The
converter dissipates very little power with this method. The
measured input power for the conditions of Figure 4 is 2.5W.
The over-current function will trip at a peak inductor current
(I
where I
typical). The OC trip point varies mainly due to the
MOSFET’s r
in the normal operating load range, find the R
from the equation above with:
For an equation for the ripple current see the section under
component guidelines titled “Output Inductor Selection.”
sink develops a voltage across R
NOTE: 0 = connected to GND or V
I
1. The maximum r
2. The minimum I
3. Determine I
PEAK
IN
PEAK)
SS
VID4
. When the voltage across the upper MOSFET (also
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
where I is the output inductor ripple current.
, and PWM operation resumes with the error amplifier
=
OCSET
determined by:
I
---------------------------------------------------- -
OCSET
VID3
DS(ON)
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
SS
r
is the internal OCSET current source (200 A
IN
DS ON
, the soft start function inhibits PWM operation
PEAK
PIN NAME
) exceeds the voltage across R
x R
DS(ON)
OCSET
VID2
variations. To avoid over-current tripping
OCSET
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
SS
for
to 4V to complete its cycle. Figure 4
2-115
SS
at the highest junction temperature.
from the specification table.
I
PEAK
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
with a 10 A current sink and
SS
OCSET
, 1 = connected to V
I
OUT MAX
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
that is referenced to
OCSET
NOMINAL OUTPUT
VOLTAGE DACOUT
+
TABLE 1. OUTPUT VOLTAGE PROGRAM
OCSET
I
SS
OCSET
2
1.30
1.35
1.40
1.45
1.50
1.55
1.60
1.65
1.70
1.75
1.80
1.85
1.90
1.95
2.00
2.05
DD
resistor
,
, the
through pull-up resistors.
HIP6005B
)
VID4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A small ceramic capacitor should be placed in parallel with
R
presence of switching noise on the input voltage.
Output Voltage Program
The output voltage of a HIP6005B converter is programmed
to discrete levels between 1.8V
identification (VID) pins program an internal voltage
reference (DACOUT) with a TTL-compatible, 5-bit
digital-to-analog converter (DAC). The level of DACOUT also
sets the PGOOD and OVP thresholds. Table 1 specifies the
DACOUT voltage for the 32 different combinations of
connections on the VID pins. The output voltage should not
be adjusted while the converter is delivering power. Remove
input power before changing the output voltage. Adjusting
the output voltage during operation could toggle the PGOOD
signal and exercise the overvoltage protection.
‘11111’ VID pin combination resulting in a 0V output setting
activates the Power-On Reset function and disables the gate
drive circuitry. For this specific VID combination, though,
PGOOD asserts a high level. This unusual behavior has been
implemented in order to allow for operation in
dual-microprocessor systems where AND-ing of the PGOOD
signals from two individual power converters is implemented.
Application Guidelines
Layout Considerations
As in any high frequency switching converter, layout is very
important. Switching current from one power device to another
can generate voltage transients across the impedances of the
interconnecting bond wires and circuit traces. These
interconnecting impedances should be minimized by using
wide, short printed circuit traces. The critical components
should be located as close together as possible using ground
plane construction or single point grounding.
OCSET
VID3
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
to smooth the voltage across R
PIN NAME
VID2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
DC
VID0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
and 3.5V
OCSET
NOMINAL OUTPUT
VOLTAGE DACOUT
DC
. The voltage
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
in the
0