RD48F2000P0ZBQ0 Intel Corporation, RD48F2000P0ZBQ0 Datasheet - Page 47
RD48F2000P0ZBQ0
Manufacturer Part Number
RD48F2000P0ZBQ0
Description
Intel StrataFlash Embedded Memory
Manufacturer
Intel Corporation
Datasheet
1.RD48F2000P0ZBQ0.pdf
(102 pages)
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Figure 27.
8.3
Datasheet
(A) Reset during
(B) Reset during
(C) Reset during
(D) VCC Power-up to
read mode
program or block erase
P1 ≤ P2
program or block erase
P1 ≥ P2
RST# high
Reset Operation Waveforms
Power Supply Decoupling
Flash memory devices require careful power supply de-coupling. Three basic power supply current
considerations are: 1) standby current levels; 2) active current levels; and 3) transient peaks
produced when CE# and OE# are asserted and deasserted.
When the device is accessed, many internal conditions change. Circuits within the device enable
charge-pumps, and internal logic states change at high speed. All of these internal activities
produce transient signals. Transient current magnitudes depend on the device outputs’ capacitive
and inductive loading. Two-line control and correct de-coupling capacitor selection suppress
transient voltage peaks.
Because Intel
and VCCQ, each power connection should have a 0.1 µF ceramic capacitor to ground. High-
frequency, inherently low-inductance capacitors should be placed as close as possible to package
leads.
Additionally, for every eight devices used in the system, a 4.7 µF electrolytic capacitor should be
placed between power and ground close to the devices. The bulk capacitor is meant to overcome
voltage droop caused by PCB trace inductance.
®
Multi-Level Cell (MLC) flash memory devices draw their power from V
Intel StrataFlash
Order Number: 306666, Revision: 001
RST# [P]
RST# [P]
RST# [P]
V
CC
®
Embedded Memory (P30)
V
V
V
V
V
V
V
0V
CC
IH
IH
IH
IL
IL
IL
P1
P2
P2
P3
Complete
Abort
Complete
Abort
1-Gbit P30 Family
April 2005
CC
R5
R5
, VPP,
R5
47
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