M28W320 STMicroelectronics, M28W320 Datasheet - Page 7

• Manufacturer Part Number: M28W320
• Description: 32 Mbit 2Mb x16/ Boot Block Low Voltage Flash Memory
• Manufacturer: STMicroelectronics

DEVICE OPERATIONS
Four control pins rule the hardware access to the
Flash memory: E, G, W, RP. The following opera-
tions can be performed using the appropriate bus
cycles: Read, Write the Command of an Instruc-
tion, Output Disable, Stand-by, Reset (see Table
5).
Read. Read operations are used to output the
contents of the Memory Array, the Electronic Sig-
nature, the Status Register and the CFI. Both Chip
Enable (E) and Output Enable (G) must be at V
in order to perform the read operation. The Chip
Enable input should be used to enable the device.
Output Enable should be used to gate data onto
the output independently of the device selection.
The data read depend on the previous command
written to the memory (see instructions RD, RSIG,
RSR, RCFI). Read Array is the default state of the
device when exiting reset or after power-up.
Write. Write operations are used to give Com-
mands to the memory or to latch Input Data to be
programmed. A write operation is initiated when
Chip Enable E and Write Enable W are at V
Output Enable G at V
Table 5. User Bus Operations
Note: 1. X = V
Table 6. Read Electronic Signature (RSIG Instruction)
Manufact.
Code
Device
Code
Read
Write
Output Disable
Stand-by
Reset
Code
Operation
IL
M28W320CT
M28W320CB
or V
Device
IH
, V
PPH
V
V
V
V
E
X
IH
= 12V
IH
IL
IL
IL
. Commands, Input Data
V
V
V
E
IL
IL
IL
5%.
V
V
V
G
(1)
V
V
V
IL
IL
IL
G
X
X
IH
IH
IL
V
V
V
W
IH
IH
IH
V
V
A0
V
V
V
V
IH
IH
IL
IL
W
X
X
IH
IH
IL
with
V
V
V
A1
IL
IL
IL
IL
A2-A7
RP
V
V
V
V
V
and Addresses are latched on the rising edge of W
or E, whichever occur first.
Output Disable. The data outputs are high im-
pedance when the Output Enable G is at V
Stand-by. Stand-by disables most of the internal
circuitry allowing a substantial reduction of the cur-
rent consumption. The memory is in stand-by
when Chip Enable E is at V
read mode. The power consumption is reduced to
the stand-by level and the outputs are set to high
impedance, independently from the Output Enable
G or Write Enable W inputs. If E switches to V
during program or erase operation, the device en-
ters in stand-by when finished.
Reset. During Reset mode all internal circuits are
switched off, the memory is deselected and the
outputs are put in high impedance. The memory is
in Reset mode when RP is at V
sumption is reduced to the stand-by level, inde-
pendently from the Chip Enable E, Out-put Enable
G or Write Enable W inputs. If RP is pulled to V
during a Program or Erase, this operation is abort-
ed and the memory content is no longer valid as it
has been compromised by the aborted operation.
0
0
0
IH
IH
IH
IH
IL
Don’t Care
Don’t Care
Don’t Care
A8-A11
WP
X
X
X
X
X
Don’t Care
Don’t Care
Don’t Care
A12-A20
M28W320CT, M28W320CB
V
Don’t Care
Don’t Care
Don’t Care
Don’t Care
DD
V
or V
PP
PPH
IH
DQ0-DQ7 DQ8-DQ15
and the device is in
BAh
BBh
IL
20h
. The power con-
Data Output
DQ0-DQ15
Data Input
Hi-Z
Hi-Z
Hi-Z
00h
88h
88h
IH
.
7/42
SS
IH