M95640 ST Microelectronics, M95640 Datasheet - Page 16

• Manufacturer Part Number: M95640
• Description: 64/32/16/8 Kbit Serial SPI Bus EEPROM With High Speed Clock
• Manufacturer: ST Microelectronics

M95640, M95320
Table 5. Protection Modes
Note: 1. As defined by the values in the Block Protect (BP1, BP0) bits of the Status Register, as shown in Table 3.
The protection features of the device are summa-
rized in Table 3.
When the Status Register Write Disable (SRWD)
bit of the Status Register is 0 (its initial delivery
state), it is possible to write to the Status Register
provided that the Write Enable Latch (WEL) bit has
previously been set by a Write Enable (WREN) in-
struction, regardless of the whether Write Protect
(W) is driven High or Low.
When the Status Register Write Disable (SRWD)
bit of the Status Register is set to 1, two cases
need to be considered, depending on the state of
Write Protect (W):
– If Write Protect (W) is driven High, it is possible
– If Write Protect (W) is driven Low, it is not pos-
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Signal
to write to the Status Register provided that the
Write Enable Latch (WEL) bit has previously
been set by a Write Enable (WREN) instruction.
sible to write to the Status Register even if the
Write Enable Latch (WEL) bit has previously
been set by a Write Enable (WREN) instruction.
(Attempts to write to the Status Register are re-
jected, and are not accepted for execution). As
a consequence, all the data bytes in the memo-
ry area that are software protected (SPM) by the
W
1
0
1
0
SRWD
Bit
0
0
1
1
Protected
Hardware
Protected
Software
(SPM)
(HPM)
Mode
Status Register is
Writable (if the WREN
instruction has set the
WEL bit)
The values in the BP1
and BP0 bits can be
changed
Status Register is
Hardware write protected
The values in the BP1
and BP0 bits cannot be
changed
Write Protection of the
Status Register
Regardless of the order of the two events, the
Hardware Protected Mode (HPM) can be entered:
– by setting the Status Register Write Disable
– or by driving Write Protect (W) Low after setting
The only way to exit the Hardware Protected Mode
(HPM) once entered is to pull Write Protect (W)
High.
If Write Protect (W) is permanently tied High, the
Hardware Protected Mode (HPM) can never be
activated, and only the Software Protected Mode
(SPM), using the Block Protect (BP1, BP0) bits of
the Status Register, can be used.
Table 6. Address Range Bits
Note: 1. b15 to b13 are Don’t Care on the M95640.
Write Protected
Write Protected
Block Protect (BP1, BP0) bits of the Status Reg-
ister, are also hardware protected against data
modification.
(SRWD) bit after driving Write Protect (W) Low
the Status Register Write Disable (SRWD) bit.
Address Bits
Protected Area
Device
b15 to b12 are Don’t Care on the M95320.
Memory Content
1
M95640
A12-A0
Ready to accept Write
instructions
Ready to accept Write
instructions
Unprotected Area
M95320
A11-A0
1