AT25F1024 ATMEL Corporation, AT25F1024 Datasheet - Page 8

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AT25F1024

Manufacturer Part Number
AT25F1024
Description
SPI Serial Memory
Manufacturer
ATMEL Corporation
Datasheet

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Table 4. Block Write Protect Bits
8
Level
0
1(1/4)
2(1/2)
3(All)
AT25F512/1024
Status Register Bits
BP1
0
0
1
1
BP0
0
1
0
1
Table 3. Read Status Register Bit Definition
READ PRODUCT ID (RDID): The RDID instruction allows the user to read the manufac-
turer and product ID of the device. The first byte after the instruction will be the
manufacturer code (1FH = ATMEL), followed by the device code.
WRITE STATUS REGISTER (WRSR): The WRSR instruction allows the user to select
one of four levels of protection for the AT25F1024. The AT25F1024 is divided into four
sectors where the top quarter (1/4), top half (1/2), or all of the memory sectors can be
protected (locked out) from write. The AT25F512 is divided into 2 sectors where all of
the memory sectors can be protected (locked out) from write. Any of the locked-out sec-
tors will therefore be READ only. The locked-out sector and the corresponding status
register control bits are shown in Table 4.
The three bits, BP0, BP1, and WPEN, are nonvolatile cells that have the same proper-
ties and functions as the regular memory cells (e.g., WREN, t
Bit
Bit 0 (RDY)
Bit 1 (WEN)
Bit 2 (BP0)
Bit 3 (BP1)
Bits 4-6 are 0s when device is not in an internal write cycle.
Bit 7 (WPEN)
Bits 0-7 are 1s during an internal write cycle.
Array Addresses
000000 - 00FFFF
Locked Out
None
AT25F512
Definition
Bit 0 = 0 (RDY) indicates the device is READY. Bit 0 = 1 indicates the
write cycle is in progress.
Bit 1 = 0 indicates the device is not WRITE ENABLED. Bit 1 = 1 indicates
the device is WRITE ENABLED.
See Table 4.
See Table 4.
See Table 5.
Locked-out
All sectors
Sector(s)
(1 - 2)
None
Array Addresses
018000 - 01FFFF
010000 - 01FFFF
000000 - 01FFFF
Locked Out
None
WC
AT25F1024
, RDSR).
Locked-out
Sector 3, 4
All sectors
1440M–SEEPR–7/03
Sector(s)
Sector 4
(1 - 4)
None

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