LP2996LQ National Semiconductor, LP2996LQ Datasheet - Page 9

• Manufacturer Part Number: LP2996LQ
• Description: DDR Termination Regulator
• Manufacturer: National Semiconductor

Pin Descriptions
AVIN AND PVIN
AVIN and PVIN are the input supply pins for the LP2996.
AVIN is used to supply all the internal control circuitry. PVIN,
however, is used exclusively to provide the rail voltage for
the output stage used to create VTT. These pins have the
capability to work off separate supplies depending on the
application. Higher voltages on PVIN will increase the maxi-
mum continuous output current because of output RDSON
limitations at voltages close to VTT. The disadvantage of
high values of PVIN is that the internal power loss will also
increase, thermally limiting the design. For SSTL-2 applica-
tions, a good compromise would be to connect the AVIN and
PVIN directly together at 2.5V. This eliminates the need for
bypassing the two supply pins separately. The only limitation
on input voltage selection is that PVIN must be equal to or
lower than AVIN. It is recommended to connect PVIN to
voltage rails equal to or less than 3.3V to prevent the thermal
limit from tripping because of excessive internal power dis-
sipation. If the junction temperature exceeds the thermal
shutdown than the part will enter a shutdown state identical
to the manual shutdown where V
remains active.
VDDQ
VDDQ is the input used to create the internal reference
voltage for regulating V
ated from a resistor divider of two internal 50kΩ resistors.
This guarantees that V
optimal implementation of VDDQ is as a remote sense. This
can be achieved by connecting VDDQ directly to the 2.5V
rail at the DIMM instead of AVIN and PVIN. This ensures that
the reference voltage tracks the DDR memory rails precisely
without a large voltage drop from the power lines. For
SSTL-2 applications VDDQ will be a 2.5V signal, which will
create a 1.25V termination voltage at V
Characteristics Table for exact values of V
ture).
V
The purpose of the sense pin is to provide improved remote
load regulation. In most motherboard applications the termi-
nation resistors will connect to V
output voltage was regulated only at the output of the
LP2996 then the long trace will cause a significant IR drop
resulting in a termination voltage lower at one end of the bus
than the other. The V
performance, by connecting it to the middle of the bus. This
will provide a better distribution across the entire termination
bus. If remote load regulation is not used then the V
pin must still be connected to V
when a long V
to the memory. Noise pickup in the V
problems with precise regulation of V
ramic capacitor placed next to the V
any high frequency signals and preventing errors.
SHUTDOWN
The LP2996 contains an active low shutdown pin that can be
used to tri-state VTT. During shutdown V
exposed to voltages that exceed AVIN. With the shutdown
pin asserted low the quiescent current of the LP2996 will
drop, however, V
pedance of 100kΩ for generating the internal reference.
Therefore to calculate the total power loss in shutdown both
SENSE
SENSE
DDQ
trace is implemented in close proximity
SENSE
will always maintain its constant im-
TT
TT
will track VDDQ / 2 precisely. The
. The reference voltage is gener-
pin can be used to improve this
TT
TT
TT
. Care should be taken
SENSE
in a long plane. If the
SENSE
is tri-stated and V
TT
. A small 0.1uF ce-
TT
TT
TT
pin can help filter
trace can cause
(See Electrical
should not be
over tempera-
SENSE
REF
9
currents need to be considered. For more information refer
to the Thermal Dissipation section. The shutdown pin also
has an internal pull-up current, therefore to turn the part on
the shutdown pin can either be connected to AVIN or left
open.
V
V
voltage VDDQ / 2. This output should be used to provide the
reference voltage for the Northbridge chipset and memory.
Since these inputs are typically an extremely high imped-
ance, there should be little current drawn from V
improved performance, an output bypass capacitor can be
used, located close to the pin, to help with noise. A ceramic
capacitor in the range of 0.1 µF to 0.01 µF is recommended.
This output remains active during the shutdown state and
thermal shutdown events for the suspend to RAM function-
ality.
V
V
resistors. It is capable of sinking and sourcing current while
regulating the output precisely to VDDQ / 2. The LP2996 is
designed to handle peak transient currents of up to
a fast transient response. The maximum continuous current
is a function of V
PERFORMANCE CHARACTERISTICS section. If a tran-
sient is expected to last above the maximum continuous
current rating for a significant amount of time then the output
capacitor should be sized large enough to prevent an exces-
sive voltage drop. Despite the fact that the LP2996 is de-
signed to handle large transient output currents it is not
capable of handling these for long durations, under all con-
ditions. The reason for this is the standard packages are not
able to thermally dissipate the heat as a result of the internal
power loss. If large currents are required for longer dura-
tions, then care should be taken to ensure that the maximum
junction temperature is not exceeded. Proper thermal derat-
ing should always be used (please refer to the Thermal
Dissipation section). If the junction temperature exceeds the
thermal shutdown point than V
returns below the hysteretic trip-point.
Component Selections
INPUT CAPACITOR
The LP2996 does not require a capacitor for input stability,
but it is recommended for improved performance during
large load transients to prevent the input rail from dropping.
The input capacitor should be located as close as possible to
the PVIN pin. Several recommendations exist dependent on
the application required. A typical value recommended for AL
electrolytic capacitors is 50 µF. Ceramic capacitors can also
be used, a value in the range of 10 µF with X5R or better
would be an ideal choice. The input capacitance can be
reduced if the LP2996 is placed close to the bulk capaci-
tance from the output of the 2.5V DC-DC converter. If the two
supply rails (AVIN and PVIN) are separated then the 47uF
capacitor should be placed as close to possible to the PVIN
rail. An additional 0.1uF ceramic capacitor can be placed on
the AVIN rail to prevent excessive noise from coupling into
the device.
REF
REF
TT
TT
is the regulated output that is used to terminate the bus
provides the buffered output of the internal reference
IN
and can be viewed in the TYPICAL
TT
will tri-state until the part
www.national.com
±
REF
3A with
. For