LP2996LQ National Semiconductor, LP2996LQ Datasheet - Page 11

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LP2996LQ

Manufacturer Part Number
LP2996LQ
Description
DDR Termination Regulator
Manufacturer
National Semiconductor
Datasheets

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Thermal Dissipation
Additional improvements in lowering the θ
achieved with a constant airflow across the package. Main-
taining the same conditions as above and utilizing the 2x2
via array, Figure 4 shows how the θ
Optimizing the θ
board exposed to lower ambient temperature allows the part
FIGURE 4. θ
JA
JA
vs Airflow Speed (JEDEC Board with 4
and placing the LP2996 in a section of a
Vias)
JA
(Continued)
varies with airflow.
JA
can also be
20057509
11
to operate with higher power dissipation. The internal power
dissipation can be calculated by summing the three main
sources of loss: output current at V
sourcing, and quiescent current at AVIN and VDDQ. During
the active state (when shutdown is not held low) the total
internal power dissipation can be calculated from the follow-
ing equations:
Where,
To calculate the maximum power dissipation at V
conditions at V
current. Although only one equation will add into the total,
V
The power dissipation of the LP2996 can also be calculated
during the shutdown state. During this condition the output
V
will disappear as it cannot sink or source any current (leak-
age is negligible). The only losses during shutdown will be
the reduced quiescent current at AVIN and the constant
impedance that is seen at the VDDQ pin.
TT
TT
cannot source and sink current simultaneously.
will tri-state, therefore that term in the power equation
P
P
P
VDDQ
VDDQ
VTT
P
TT
VTT
= ( V
= V
= V
P
D
need to be examined, sinking and sourcing
VDDQ
VDDQ
= V
= P
P
P
P
PVIN
AVIN
AVIN
D
VTT
AVIN
= P
* I
* I
- V
= I
= I
x I
AVIN
VDDQ
VDDQ
+ P
VTT
AVIN
AVIN
LOAD
VDDQ
) x I
+ P
= V
= V
x V
* V
(Sinking) or
VDDQ
LOAD
AVIN
VDDQ2
AVIN
VDDQ2
+ P
TT
VTT
, either sinking or
(Sourcing
x R
x R
VDDQ
VDDQ
www.national.com
TT
both

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