HD643303x Hitachi, HD643303x Datasheet - Page 169

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HD643303x

Manufacturer Part Number
HD643303x
Description
Hitachi Microcomputer
Manufacturer
Hitachi
Datasheet
7.10.2 Register Descriptions
Table 7-15 summarizes the registers of port A.
Table 7-15 Port A Registers
Address*
H'FFD1
H'FFD3
Note: * Lower 16 bits of the address.
Port A Data Direction Register (PADDR): PADDR is an 8-bit write-only register that can select
input or output for each pin in port A.
A pin in port A becomes an output pin if the corresponding PADDR bit is set to 1, and an input pin
if this bit is cleared to 0.
PADDR is a write-only register. Its value cannot be read. All bits return 1 when read.
PADDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting. If a PADDR bit is set to 1, the corresponding pin maintains its output
state in software standby mode.
Bit
Initial value
Read/Write
Name
Port A data direction register
Port A data register
PA DDR
7
W
7
0
PA DDR
6
W
6
0
PA DDR
5
W
5
0
Port A data direction 7 to 0
These bits select input or output for port A pins
PA DDR
154
4
W
Abbreviation
PADDR
PADR
4
0
PA DDR
3
W
3
0
PA DDR
R/W
W
R/W
2
W
2
0
PA DDR
1
W
1
0
Initial Value
H'00
H'00
PA DDR
0
W
0
0

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