AT89S51-24SC ATMEL Corporation, AT89S51-24SC Datasheet - Page 11

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AT89S51-24SC

Manufacturer Part Number
AT89S51-24SC
Description
8-bit Microcontroller with 4K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
Oscillator
Characteristics
Idle Mode
Power-down
Mode
2487B–MICRO–12/03
XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be
configured for use as an on-chip oscillator, as shown in Figure 2. Either a quartz crystal or
ceramic resonator may be used. To drive the device from an external clock source, XTAL2
should be left unconnected while XTAL1 is driven, as shown in Figure 3. There are no require-
ments on the duty cycle of the external clock signal, since the input to the internal clocking
circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low
time specifications must be observed.
Figure 2. Oscillator Connections
Note:
Figure 3. External Clock Drive Configuration
In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain active. The
mode is invoked by software. The content of the on-chip RAM and all the special function reg-
isters remain unchanged during this mode. The idle mode can be terminated by any enabled
interrupt or by a hardware reset.
Note that when idle mode is terminated by a hardware reset, the device normally resumes pro-
gram execution from where it left off, up to two machine cycles before the internal reset
algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but
access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a
port pin when idle mode is terminated by a reset, the instruction following the one that invokes
idle mode should not write to a port pin or to external memory.
In the Power-down mode, the oscillator is stopped, and the instruction that invokes Power-
down is the last instruction executed. The on-chip RAM and Special Function Registers retain
their values until the Power-down mode is terminated. Exit from Power-down mode can be ini-
tiated either by a hardware reset or by activation of an enabled external interrupt (INT0 or
INT1). Reset redefines the SFRs but does not change the on-chip RAM. The reset should not
be activated before V
enough to allow the oscillator to restart and stabilize.
C1, C2 = 30 pF ± 10 pF for Crystals
= 40 pF ± 10 pF for Ceramic Resonators
CC
is restored to its normal operating level and must be held active long
OSCILLATOR
EXTERNAL
SIGNAL
NC
C2
C1
XTAL2
XTAL1
GND
XTAL2
XTAL1
GND
AT89S51
11

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