A29L004UW-70 AMICC [AMIC Technology], A29L004UW-70 Datasheet - Page 15

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A29L004UW-70

Manufacturer Part Number
A29L004UW-70
Description
512K X 8 Bit CMOS 3.0 Volt-only, Boot Sector Flash Memory
Manufacturer
AMICC [AMIC Technology]
Datasheet
Legend:
X = Don't care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the
PD = Data to be programmed at location PA. Data latches on the rising edge of
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A18 - A13 select a unique sector.
Note:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Except when reading array or autoselect data, all bus cycles are write operation.
4. Address bits A18 - A11 are don't cares for unlock and command cycles, unless SA or PA required.
5. No unlock or command cycles required when reading array data.
6. The Reset command is required to return to reading array data when device is in the autoselect mode, or if I/O
7. The fourth cycle of the autoselect command sequence is a read cycle.
8. The data is 00h for an unprotected sector and 01h for a protected sector. See “Autoselect Command Sequence” for more
9. The Unlock Bypass command is required prior to the Unlock Bypass Program command.
10. The Unlock Bypass Reset command is required to return to reading array data when the device is in the unlock bypass
11. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode.
12. The Erase Resume command is valid only during the Erase Suspend mode.
PRELIMINARY
Program
Unlock Bypass
Unlock Bypass Program (Note 10)
Unlock Bypass Reset (Note 11)
Chip Erase
Sector Erase
Erase Suspend (Note 12)
Erase Resume (Note 13)
Read (Note 6)
Reset (Note 7)
(while the device is providing status data).
information.
mode.
Manufacturer ID
Device ID,
Top Boot Block
Device ID,
Bottom Boot Block
Continuation ID
Sector Protect Verify
(Note 9)
whichever happens later.
Command Sequence
(Note 1)
(October, 2002, Version 0.0)
4
4
4
4
4
4
3
6
6
1
1
2
2
1
1
Table 5. A29L004 Command Definitions
Addr Data
XXX
XXX
XXX
555
555
555
555
555
555
555
555
555
RA
XXX A0
XXX 90
First
AA
AA
AA
AA
RD
AA
AA
AA
AA
B0
30
F0
AA
Addr Data
XXX
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
2AA
PA
Second
15
55
55
55
55
55
55
55
PD
55
00
55
Bus Cycles (Notes 2 - 5)
Addr Data Addr Data Addr Data Addr Data
555
555
555
555
555
555
555
555
555
Third
WE
90
90
A0
20
80
90
90
90
80
or
CE
(SA)
X00
X03
X01
X02 XX01
PA
555
555
X01
Fourth
pulse, whichever happens first.
AMIC Technology, Corp.
XX00
PD
AA
AA
34
B5
37
7F
A29L004 Series
2AA
2AA
Fifth
55
55
WE
SA
555
or
Sixth
5
CE
goes high
10
30
pulse,

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