HN58S65AT-15 HITACHI [Hitachi Semiconductor], HN58S65AT-15 Datasheet - Page 14
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HN58S65AT-15
Manufacturer Part Number
HN58S65AT-15
Description
64 k EEPROM (8-kword x 8-bit) Ready/Busy function
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1.HN58S65AT-15.pdf
(18 pages)
HN58S65A Series
Functional Description
Automatic Page Write
Page-mode write feature allows 1 to 64 bytes of data to be written into the EEPROM in a single write
cycle. Following the initial byte cycle, an additional 1 to 63 bytes can be written in the same manner.
Each additional byte load cycle must be started within 30 s from the preceding falling edge of WE or
CE. When CE or W E is kept high for 100 s after data input, the EEPROM enters write mode
automatically and the input data are written into the EEPROM.
Data Polling
Data polling indicates the status that the EEPROM is in a write cycle or not. If EEPROM is set to read
mode during a write cycle, an inversion of the last byte of data outputs from I/O7 to indicate that the
EEPROM is performing a write operation.
RDY/Busy Signal
RDY/B us y signal also allows status of the EEPROM to be determined. The RDY/Busy signal has high
impedance except in write cycle and is lowered to V
after the first write signal. At the end of a write
OL
cycle, the RDY/Busy signal changes state to high impedance.
WE, CE Pin Operation
During a write cycle, addresses are latched by the falling edge of WE or CE, and data is latched by the
rising edge of WE or CE.
Write/Erase Endurance and Data Retention Time
5
4
The endurance is 10
cycles in case of the page programming and 10
cycles in case of the byte
programming (1% cumulative failure rate). The data retention time is more than 10 years when a device
4
is page-programmed less than 10
cycles.