ISPLSI1016EA LATTICE [Lattice Semiconductor], ISPLSI1016EA Datasheet - Page 10

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ISPLSI1016EA

Manufacturer Part Number
ISPLSI1016EA
Description
In-System Programmable High Density PLD
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet

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ISPLSI1016EA-100LJ44
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Power consumption in the ispLSI 1016EA device de-
pends on two primary factors: the speed at which the
device is operating and the number of Product Terms
Figure 4. Typical Device Power Consumption vs fmax
I CC can be estimated for the ispLSI 1016EA using the following equation:
I CC (mA) = 23 + (# of PTs * 0.52) + (# of nets * max freq * 0.004)
Where:
The I CC estimate is based on typical conditions (V CC = 5.0V, room temperature) and an assumption of four GLB loads
on average exists and the device is filled with four 16-bit counters. These values are for estimates only. Since the
value of I CC is sensitive to operating conditions and the program in the device, the actual I CC should be verified.
Maximum GRP Delay vs GLB Loads
Power Consumption
# of PTs = Number of product terms used in design
# of nets = Number of signals used in device
Max freq = Highest clock frequency to the device (in MHz)
150
140
130
120
110
100
90
80
4
3
2
1
0
1
Notes: Configuration of four 16-bit counters
50
4
Typical current at 5V, 25 C
GLB Load
100
f
max (MHz)
8
10
150
used. Figure 4 shows the relationship between power
and operating speed.
ispLSI 1016EA
Specifications ispLSI 1016EA
GRP/GLB/1016EA
200
16
ispLSI 1016EA-100
ispLSI 1016EA-125
ispLSI 1016EA-200
250
0127/1016EA

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