HT82A821R_07 HOLTEK [Holtek Semiconductor Inc], HT82A821R_07 Datasheet - Page 13

• Manufacturer Part Number: HT82A821R_07
• Description: USB Audio MCU
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

Timer/Event Counter
Two timer/event counters (TMR0, TMR1) are imple-
mented in the microcontroller. The timer/event counter
0/1 contains a 16-bit programmable count-up counter
and the clock may come from an external source or an
internal clock source. An internal clock source comes
from f
count external events, measure time intervals or pulse
widths, or to generate an accurate time base. There are
six registers related to the Timer/Event Counter 0;
TMR0H (0CH), TMR0L (0DH), TMR0C (0EH) and the
Timer/Event Counter 1; TMR1H (0FH), TMR1L (10H),
TMR1C (11H). For 16-bit timer to write data to TMR0/1L
will only put the written data to an internal lower-order
byte buffer (8-bit) and writing TMR0/1H will transfer the
specified data and the contents of the lower-order byte
buffer to TMR0/1H and TMR0/1L registers. The
Timer/Event Counter 0/1 preload register is changed by
each writing TMR0/1H operations. Reading TMR0/1H
will latch the contents of TMR0/1H and TMR0/1L coun-
ters to the destination and the lower-order byte buffer,
respectively. Reading the TMR0/1L will read the con-
tents of the lower-order byte buffer. The TMR0/1C is the
Timer/Event Counter 0/1 control register, which defines
the operating mode, counting enable or disable and an
active edge.
The TM0 and TM1 bits define the operation mode. The
event count mode is used to count external events,
which means that the clock source is from an external
Rev. 1.10
Bit No.
0~2, 5
3
4
6
7
SYS
/4. The external clock input allows the user to
Label
TON
TM0
TM1
TE
Unused bit, read as 0
Defines the TMR active edge of the timer/event counter
In Event counter mode (TM1, TM0)=(0, 1):
1=count on falling edge;
0=count on rising edge
In Pulse width measurement mode (TM1, TM0)=(1, 1):
1=start counting on the rising edge, stop on the falling edge;
0=start counting on the falling edge, stop on the rising edge
Enable/disable the timer counting (0=disable; 1=enable)
Defines the operating mode
01=Event count mode (external clock)
10=Timer mode (internal clock)
11=Pulse width measurement mode
00=Unused
Timer/Event Counter 0/1
TMRC (11H) Register
13
(TMR0, TMR1) pin. The timer mode functions as a nor-
mal timer with the clock source coming from the internal
clock source. Finally, the pulse width measurement
mode can be used to count the high level or low level du-
ration of the external signal (TMR0, TMR1), and the
counting is based on the internal clock source.
In the event count or timer mode, the timer/event coun-
ter starts counting at the current contents in the
timer/event counter and ends at FFFFH. Once an over-
flow occurs, the counter is reloaded from the timer/event
counter preload register, and generates an interrupt re-
quest flag (T0F; bit 5 of INTC0, T1F; bit 6 of INTC0). In
the pulse width measurement mode with the values of
the TON and TE bits equal to 1, after the TMR0 (TMR1)
has received a transient from low to high (or high to low if
the TE bit is 0 ), it will start counting until the TMR0
(TMR1) returns to the original level and resets the TON.
The measured result remains in the timer/event counter
even if the activated transient occurs again. In other
words, only 1-cycle measurement can be made until the
TON is set. The cycle measurement will re-function as
long as it receives further transient pulse. In this opera-
tion mode, the timer/event counter begins counting not
according to the logic level but to the transient edges. In
the case of counter overflows, the counter is reloaded
from the timer/event counter register and issues an in-
terrupt request, as in the other two modes, i.e., event
and timer modes.
Function
HT82A821R
June 29, 2007