HT82A520R HOLTEK [Holtek Semiconductor Inc], HT82A520R Datasheet - Page 16

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HT82A520R

Manufacturer Part Number
HT82A520R
Description
Full Speed USB 8-Bit OTP MCU with SPI
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet
means the inputs must be ready at the T2 rising edge of
instruction MOV A,[m] , where m denotes the port ad-
dress. For output operation, all the data is latched and
remains unchanged until the output latch is rewritten.
Pull-high Resistors
Many product applications require pull-high resistors for
their switch inputs usually requiring the use of an exter-
nal resistor. To eliminate the need for these external re-
sistors, I/O pins, when configured as an input have the
capability of being connected to an internal pull-high re-
sistor. The pull-high resistors are selectable via configu-
ration options and are implemented using weak PMOS
transistors. Each pin on all of I/O can be selected indi-
vidually to have this pull-high Resistors feature and
each nibble on each of the other ports.
Port Pin Wake-up
If the HALT instruction is executed, the device will enter
the Power Down Mode, where the system clock will stop
resulting in power being conserved, a feature that is im-
portant for battery and other low-power applications.
Various methods exist to wake-up the microcontroller,
one of which is to change the logic condition on one of
the port pins from high to low. After a HALT instruction
forces the microcontroller into entering the Power Down
Mode, the processor will remain in a low-power state un-
til the logic condition of the selected wake-up pin on the
port pin changes from high to low. This function is espe-
cially suitable for applications that can be woken up via
external switches. Each pin on PA has a bit wake-up
configuration option and PB, PC have nibble wake-up
configuration options.
I/O Port Control Registers
Each I/O port has its own control register PAC, PBC,
PCC, to control the input/output configuration. With this
control register, each CMOS output or input with or with-
out pull-high resistor structures can be reconfigured dy-
namically under software control. Each of the I/O ports is
directly mapped to a bit in its associated port control reg-
ister. Note that several pins can be setup to have NMOS
outputs using configuration options.
For the I/O pin to function as an input, the corresponding
bit of the control register must be written as a 1 . This
will then allow the logic state of the input pin to be di-
rectly read by instructions. When the corresponding bit
of the control register is written as a 0 , the I/O pin will
be setup as an output. If the pin is currently setup as an
output, instructions can still be used to read the output
register. However, it should be noted that the program
will in fact only read the status of the output data latch
and not the actual logic status of the output pin.
Rev.1.00
16
Port B VDDIO Function
The output drivers of most I/O pins use the VDD power
supply line as their high voltage level. In this device pins
PB0~PB6 can use a different voltage, other than VDD as
their high level. This is supplied externally on pin PB7.
This function is selected using a configuration option.
Pin-shared Functions
The flexibility of the microcontroller range is greatly en-
hanced by the use of pins that have more than one func-
tion. Limited numbers of pins can force serious design
constraints on designers but by supplying pins with
multi-functions, many of these difficulties can be over-
come. For some pins, the chosen function of the
multi-function I/O pins is set by configuration options
while for others the function is set by application pro-
gram control.
External interrupt input
The external interrupt pin INT is pin-shared with the
I/O pin PA6. For applications not requiring an external
interrupt input, the pin-shared external interrupt pin
can be used as a normal I/O pin, however to do this,
the external interrupt enable bits in the INTC0 register
must be disabled.
External Timer Clock Inputs
The external timer pin TMR is pin-shared with an I/O
pin. To configure this pin to operate as a timer input,
the corresponding control bit in the timer control regis-
ter must be correctly set. For applications that do not
require an external timer input, this pin can be used as
a normal I/O pin. Note that if used as a normal I/O pin
the timer mode control bits in the timer control register
must select the timer mode, which has an internal
clock source, to prevent the input pin from interfering
with the timer operation.
PWM outputs
The device contains three PWM outputs which are
pin-shared with I/O pins. The PWM output functions
are chosen via registers. Note that the corresponding
bit of the port control register, PAC and PBC, must
setup the pin as an output to enable the PWM output.
If the PAC and PBC port control register has setup the
pin as an input, then the pin will function as a normal
logic input with the usual pull-high option, even if the
PWM configuration option has been selected.
HT82A520R/HT82A620R
October 23, 2009

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