AGLE3000V2-FFG896 ACTEL [Actel Corporation], AGLE3000V2-FFG896 Datasheet - Page 2

no-image

AGLE3000V2-FFG896

Manufacturer Part Number
AGLE3000V2-FFG896
Description
IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
Manufacturer
ACTEL [Actel Corporation]
Datasheet
I/Os Per Package
IGLOOe FPGAs Package Sizes Dimensions
IGLOOe Devices
ARM-Enabled IGLOOe Devices
Package
FG256
FG484
FG896
Notes:
1. When considering migrating your design to a lower- or higher-density device, refer to the
2. Each used differential I/O pair reduces the number of single-ended I/Os available by two.
3. For AGLE3000 devices, the usage of certain I/O standards is limited as follows:
4. FG256 and FG484 are footprint-compatible packages.
5. When using voltage-referenced I/O standards, one I/O pin should be assigned as a voltage-referenced pin (V
6. When the Flash*Freeze pin is used to directly enable Flash*Freeze mode and not as a regular I/O, the number of single-
7. "G" indicates RoHS-compliant packages. Refer to
Package
Length × Width (mm × mm)
Nominal Area (mm
Pitch (mm)
Height (mm)
I I
FPGAs with Flash*Freeze Technology
– SSTL3(I) and (II): up to 40 I/Os per north or south bank
– LVPECL / GTL+ 3.3 V / GTL 3.3 V: up to 48 I/Os per north or south bank
– SSTL2(I) and (II) / GTL+ 2.5 V/ GTL 2.5 V: up to 72 I/Os per north or south bank
minibank (group of I/Os). When the Flash*Freeze pin is used to directly enable Flash*Freeze mode and not as a regular
I/O, the number of single-ended user I/Os available is reduced by one.
ended user I/Os available is reduced by one.
"G" in the part number.
2
)
1
Single-Ended
handbook to ensure compliance with design and board migration requirements.
I/O
165
270
1
17 × 17
AGLE600
FG256
289
"IGLOOe Ordering Information" on page III
1.6
1
v1.2
Differential
I/O Pairs
135
79
I/O Types
23 × 23
FG484
2.23
529
1
Single-Ended
I/O
341
620
1
M1AGLE3000
AGLE3000
IGLOOe Low-Power Flash
for the location of the
31 × 31
Differential
FG896
2.23
I/O Pairs
961
1
168
310
REF
) per

Related parts for AGLE3000V2-FFG896