ISPPACCLK5510V-01T100C LATTICE [Lattice Semiconductor], ISPPACCLK5510V-01T100C Datasheet - Page 6
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ISPPACCLK5510V-01T100C
Manufacturer Part Number
ISPPACCLK5510V-01T100C
Description
In-System Programmable Clock Generator with Universal Fan-Out Buffer
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet
1.ISPPACCLK5510V-01T100C.pdf
(48 pages)
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Lattice Semiconductor
DC Electrical Characteristics – Differential LVPECL
DC Electrical Characteristics – Input/Output Loading
V
V
V
V
1. 100Ω differential termination.
I
I
I
I
C
1. Applies to clock reference inputs when termination ‘open’.
2. Applies to TDI, TMS inputs.
3. Applies to REFSEL, PS0, PS1, GOE, SGATE, PLL_BYPASS, OEX and OEY.
4. Applies to all logic types when in tristated mode.
5. Applies to OEX, OEY, TCK, RESET inputs.
6. Applies to REFA+, REFA-, REFB+, REFB-.
Symbol
LK
PU
PD
OLK
Symbol
IH
IL
OH
OL
IN
Input Leakage
Input Pull-up Current
Input Pull-down Current
Tristate Leakage Output
Input Capacitance
Input Voltage High
Input Voltage Low
Output High Voltage
Output Low Voltage
Parameter
Parameter
1
1
V
V
V
V
V
V
V
V
CCD
CCD
CCD
CCD
CCO
CCO
CCO
CCO
Test Conditions
= 3.0 to 3.6V
= 3.3V
= 3.0 to 3.6V
= 3.3V
= 3.0 to 3.6V
= 3.3V
= 3.0 to 3.6V
= 3.3V
Note 1
Note 2
Note 3
Note 4
Notes 2, 3, 5
Note 6
Conditions
6
V
V
V
V
CCD
CCD
CCO
CCO
Min.
2.14
1.49
2.23
1.49
- 1.17
- 1.81
- 1.07
- 1.81
ispClock5500 Family Data Sheet
Typ.
—
—
—
—
—
—
—
—
Min.
—
—
—
—
—
—
Typ.
13.5
120
V
V
V
V
80
—
—
8
CCD
CCD
CCO
CCO
Max.
2.42
1.83
2.42
1.68
- 0.88
- 1.48
- 0.88
- 1.62
Max.
±10
120
150
±10
10
15
Units
Units
µA
µA
µA
µA
pF
pF
V
V
V
V
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