ISPPAC10-01SI LATTICE [Lattice Semiconductor], ISPPAC10-01SI Datasheet - Page 22
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ISPPAC10-01SI
Manufacturer Part Number
ISPPAC10-01SI
Description
In-System Programmable Analog Circuit
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet
1.ISPPAC10-01SI.pdf
(23 pages)
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The last Lattice instruction is UBE (user bulk erase).
Operation of the device is interrupted during UBE, after
which all inputs are disconnected and all outputs driven
to VREF
programming can only be selectively done in one direc-
tion (from zeroes to ones). The UBE is used to return all
user bits to a zero state at the same time. A UBE usually
proceeds a PRGUSR operation, otherwise one to zero
changes would not be implemented. It can also be used
to erase all configuration information from a device and
is the default condition of parts shipped from the factory.
The same programming constraints apply to UBE as for
PRGUSR. The bit code for this instruction is shown in
Table 2.
IEEE Standard 1149.1 Interface (Continued)
OUT
(2.5V). To economize internal circuitry,
22
The ADDUSR, BYPASS, EXTEST, IDCODE and
SAMPLE/PRELOAD instructions are all executed in the
Update-IR state. Other instructions: PRGUSR, VERUSR
and UBE are executed upon entry of the Run-Test/Idle
state.
It is recommended that when all serial interface opera-
tions are completed, the TAP controller be reset and left
in the Test-Logic-Reset state (the power-up default) and
the TCK and TMS inputs idled. This will insure the best
analog performance possible by minimizing the effects of
digital logic “feed-through.”
Specifications ispPAC10