NCN8025A ONSEMI [ON Semiconductor], NCN8025A Datasheet
NCN8025A
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NCN8025A Summary of contents
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... NCN8025 / NCN8025A Compact SMART CARD Interface IC The NCN8025 / NCN8025A is a compact and cost−effective single smart card interface IC dedicated for 1 3 5.0 V smart card reader/writer applications. The card V built−in very low drop out and low noise LDO. The device is fully compatible with the ISO 7816−3, EMV 4.2, UICC and related standards including NDS and other STB standards (Nagravision, Irdeto ...
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... VSEL0 NCN8025A VDDP PRES PRES 4 Exposed Pad CI/O 5 GND 6 CAUX2 Figure 2. NCN8025A − QFN−24 Pinout (Top View) VDDP 10 uF 100 nF PRES PRES GND CVCC CRST CCLK CAUX1 CAUX2 CI/O GND GND GND GND 19 18 CLKIN 17 INT VSEL0 ...
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... VSEL1 12 CMDVCC 17 INT 22 CLKDIV1 CLKDIV2 23 18 CLKIN 14 RSTIN I/Ouc 19 AUX1uc 20 AUX2uc 21 GND 25 Figure 4. NCN8025A Block Diagram (QFN−24 Pin Numbering) PIN FUNCTION AND DESCRIPTION Pin Pin (QFN24) (QFN16) Name Type 1 1 VSEL0 Input 2 2 VDDP Power 3 3 PRES Input 4 − PRES ...
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PIN FUNCTION AND DESCRIPTION Pin Pin (QFN24) (QFN16) Name Type 6 − CAUX2 Input/ Output 7 − CAUX1 Input/ Output 8 − GND Ground 9 5 CCLK Output 10 6 CRST Output 11 7 CVCC Power Output 12 8 CMDVCC ...
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ATTRIBUTES ESD protection Human Body Model (HBM) (Note 1) Card Pins (card interface pins 3−11) All Other Pins Machine Model (MM) Card Pins (card interface pins 3−11) All Other Pins Moisture sensitivity (Note 2) QFN−24 and QFN−16 Flammability Rating Oxygen ...
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POWER SUPPLY SECTION ( Symbol V Regulator Power Supply, DDP CVCC = 5.0 V, |ICC| ≤ (EMV Conditions) |ICC| ≤ (NDS Conditions) CVCC = 3.0 V, |ICC| ≤ CVCC ...
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HOST INTERFACE SECTION CLKIN, RSTIN, I/Ouc, AUX1uc, AUX2uc, CLKDIV1, CLKDIV2, CMDVCC, VSEL0, VSEL1 (V 3 25° MHz) DDP amb CLKIN Symbol F Clock frequency on pin CLKIN (Note 7) CLKIN ...
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SMART CARD INTERFACE SECTION MHz) CLKIN Symbol CRST @ CVCC = 1.8 V, 3 Output RESET Output RESET Output RESET Rise time @ C R ...
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... Activation Time (Note 9) act T Deactivation Time (Note 9) deact Temp Shutdown temperature (Note Guaranteed by design and characterization. POWER SUPPLY The NCN8025 / NCN8025A smart card interface has two power supplies: V and DDP V is common to the system controller and the interface. DD The applied V range can go from 2 ...
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CLOCK DIVIDER: The input clock can be divided by 1/1, 1/2, 1/4, or 1/8, depending upon the specific application, prior to be applied to the smart card driver. These division ratios are programmed using pins CLKDIV1 and CLKDIV2 (see Table ...
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CMDVCC CVCC CIO CCLK RSTIN CRST ~200 ms Figure 5. Activation Sequence − RSTIN Mode (RSTIN Starting High) CMDVCC CVCC CIO CCLK RSTIN CRST act Figure 6. Activation Sequence − Normal Mode ...
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... CRST CCLK CIO CVCC FAULT DETECTION In order to protect both the interface and the external smart card, the NCN8025 / NCN8025A provides security features to prevent failures or damages as depicted here after. − Card extraction detection − V under voltage detection DD − Short−circuit or overload on CVCC ...
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... High only at the end of the debounce time. When the card is removed a deactivation sequence is automatically and immediately performed and INT goes Low. ESD PROTECTION The NCN8025 / NCN8025A includes devices to protect the pins against the ESD spike voltages. To cope with the different ESD voltages developed across these pins, the built VSEL0 ...
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PACKAGE DIMENSIONS PIN 1 IDENTIFICATION SEATING REF PLANE 24X ...
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D Ç Ç Ç Ç Ç Ç PIN 1 LOCATION 0.15 C TOP VIEW 0.15 C (A3) 0. 0.08 C SIDE VIEW D2 L 16X 5 8 NOTE 16X 16X ...