XR16V2650IL32 EXAR [Exar Corporation], XR16V2650IL32 Datasheet - Page 20
XR16V2650IL32
Manufacturer Part Number
XR16V2650IL32
Description
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO
Manufacturer
EXAR [Exar Corporation]
Datasheet
1.XR16V2650IL32.pdf
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XR16V2650
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO
The V2650 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 12
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX, RTS# and DTR# pins are held while the CTS#, DSR#, CD# and RI# inputs are ignored.
Caution: the RX input pin must be held HIGH during loopback test, else upon exiting the loopback test the
UART may detect and report a false “break” signal. Also, auto RTS/CTS flow control is not supported during
internal loopback.
F
2.20
IGURE
12. I
Internal Loopback
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
NTERNAL
L
OOP
B
ACK IN
Transmit Shift Register
Receive Shift Register
C
HANNEL
(RHR/FIFO)
(THR/FIFO)
PRELIMINARY
A
AND
DSR#
DTR#
RTS#
CTS#
OP2#
B
20
CD#
RI#
MCR bit-4=1
VCC
VCC
VCC
OP1#
VCC
RXA/RXB
TXA/TXB
CDA#/CDB#
RTSA#/RTSB#
CTSA#/CTSB#
DSRA#/DSRB#
DTRA#/DTRB#
RIA#/RIB#
OP2A#/OP2B#
REV. P1.0.0
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