TSC87C52-12CAB TEMIC [TEMIC Semiconductors], TSC87C52-12CAB Datasheet - Page 8

• Manufacturer Part Number: TSC87C52-12CAB
• Description: CMOS 0 to 33 MHz Programmable 8-bit Microcontroller
• Manufacturer: TEMIC [TEMIC Semiconductors]

TSC87C52
When in mode 2 and 3 (9–bit mode), RI flag is set during stop bit if framing error is enabled or during ninth bit if not
(see Figure 5).
Table 4 SCON – Serial Control Register (98h)
8
SM0/FE
7
Symbol
SM0
SM1
SM2
FE
SMOD0=0
SMOD0=1
SMOD0=1
SMOD0=X
SMOD0=1
SM1
6
RXD
RXD
FE
RI
RI
FE
RI
Figure 5 Enhanced UART timing diagram in mode 2 and 3
Description
Framing Error bit (SMOD0 bit set)
Serial Mode bit 0 (SMOD0 bit cleared)
Serial Mode bit 1
Multiprocessor Communication Enable bit
Figure 4 Enhanced UART timing diagram in mode 1
SM0/FE
SMOD1
Set by hardware when an invalid stop bit is detected.
Clear to reset the error state, not cleared by a valid stop bit.
Used with SM1 to select serial mode.
Used with SM0 to select serial mode.
Set to enable multiprocessor communication feature in mode 2 and 3.
Clear to disable multiprocessor communication feature.
SM2
Start
Start
bit
bit
5
SMOD0
Figure 3 Framing error block diagram
SM1
D0
D0
SM2
D1
D1
Preliminary
–
REN
4
D2
D2
REN
Set FE bit if stop bit is 0 (framing error)
SM0 to UART mode control
POF
To UART framing error control
D3
D3
Data byte
Data byte
TB8
GF1
D4
D4
TB8
3
RB8
GF0
D5
D5
D6
D6
PD
TI
RB8
2
D7
D7
IDL
RI
Ninth
Stop
D8
bit
bit
Stop
bit
TI
1
Rev. C – 10 Sept 1997
MATRA MHS
RI
0