M37754FFCGP MITSUBISHI [Mitsubishi Electric Semiconductor], M37754FFCGP Datasheet
M37754FFCGP
Related parts for M37754FFCGP
M37754FFCGP Summary of contents
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... CPU is a 16-bit parallel processor that can also be switched to per- form 8-bit parallel processing, and the bus interface unit enhances the memory access efficiency to execute instructions fast. In addition to the 7700 Family basic instructions, the M37754FFCGP and the M37754FFCHP have 6 special instructions which contain in- structions for signed multiplication/division; these added instructions improve the servo arithmetic performance to control hard disk drives and so on ...
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... M37754FFCGP PIN CONFIGURATION (TOP VIEW /CLK /CTS /RTS /DA /INT /CLKS /CLK /CTS /RTS /CLKS / ...
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... /INT / 100 SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION M37754FFCHP Outline 100P6Q-A MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP 50 P10 /D / P11 / P11 / P11 / P11 /D 3 ...
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... Direct Page Register DPR(16) 4 SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION Data Buffer DB (8) H Data Buffer DB (8) L (8) 0 (8) 1 (8) 2 Incrementer(24) Program Counter PC(16) Stack Pointer S(16) Index Register Y(16) Index Register X(16) Accumulator B(16) Accumulator A(16) Arithmetic Logic Unit(16) MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Data Bus(Even) Data Bus(Odd) Address Bus ...
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... Programming in unit of byte/120 Kbytes Programming in unit of byte/120 Kbytes Programming in unit of byte/112 Kbytes Batch erasing/120 Kbytes Batch erasing/120 Kbytes Batch erasing/112 Kbytes or 2-division-block erasing 2-division-block erasing: 56-Kbyte area to be erased is selectable. Program/Erase control by software command 7 commands 7 commands 7 commands 100 MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Functions 2 Functions 5 ...
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... In addition to having the same functions as port P0 in single-chip mode, these pins ___ also function as input pin for INT In memory expansion mode and microprocessor mode, these pins can be programmed as address ( MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Functions . SS for single-chip mode or SS for microprocessor mode. ...
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... Accessing internal memory <When reading> These pins enter high impedance state. <When writing> Value of internal data bus is output to these pins. (2) When using 8-bit width as external data bus width These pins become I/O port P11 MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Functions output to these pins ...
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... A input pin. Connect Input Connect Input Connect Input Connect Input Connect I/O Function as 8-bit data’s I/O pins (D Input Connect to Vss. MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Functions . SS and OUT . SS – – – ...
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... Input “H” or “L”, or keep them open. Input Input “H” or “L”, or keep them open. Input Input “H” or “L”, or keep them open. Input Input “H” or “L”, or keep them open. MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Functions . SS and OUT ...
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... BASIC FUNCTION BLOCKS The M37754FFCGP and the M37754FFCHP have the same func- tions as the M37754M8C-XXXGP and the M37754M8C-XXXHP ex- cept for the following. Therefore, refer to the section on the M37754M8C-XXXGP and the M37754M8C-XXXHP. (1) Flash memory is included instead of ROM. (2) The memory size is different. (3) The memory area modification function is different. ...
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... Timer A3 interrupt control register 000078 Timer A4 interrupt control register 000079 Timer B0 interrupt control register 00007A Timer B1 interrupt control register 00007B 00007C Timer B2 interrupt control register 00007D interrupt control register INT 0 interrupt control register 00007E INT 1 interrupt control register 00007F INT 2 MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP 11 ...
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... Contents of other registers and RAM are not initiallzed and must be in- 16 itiallzed by software. ) ··· becomes “0” when CNVss pin level is “L”; that bit becomes “1” when the pin level is “H”. 16) MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Address ( 60 ) ··· FFF ··· ...
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... MEMORY AREA MODIFICATION FUNCTION For the M37754FFCGP and the M37754FFCHP, the internal memory’s size and address area can be changed by setting bits (memory allocation select bits) of the particular function select reg- ister 0 (see figure 5). Figure 4 shows the memory map when chang- ing the internal memory area ...
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... E/RD “H” output for pins E/RD, WR STP return select bit 0 : Watchdog timer is used when returning from Stop mode 1 : Watchdog timer is not used when returning from Stop mode ; the microcomputer returns at once. MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP ) to 000FFF 16 16 ...
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... Standby The microcomputer enters the standby state by driving the CE pin high. The M37754FFCGP and the M37754FFCHP are placed in a power-down state consuming only a minimal supply current. At this time, the data input/output pins enter the floating state. Write ...
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... 100 1 Fig. 6 Pin connection of M37754FFCGP when operating in parallel input/output mode 16 SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION M37754FFCGP Outline 100P6S-A MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP 50 P11 1 49 P11 2 48 P11 3 47 P11 4 46 ...
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... 100 5 Fig. 7 Pin connection of M37754FFCHP when operating in parallel input/output mode SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION M37754FFCHP Outline 100P6Q-A MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP 50 P10 P11 0 48 P11 1 47 P11 2 46 P11 3 45 ...
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... SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION shown in Figure 8, and the M37754FFCGP and the M37754FFCHP will output the contents of the user’s specified address from data I pin to the external. In this mode, the user cannot perform any opera- tion other than read. ...
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... WE input. When the address of a memory location to be read is input in the second cycle, with control signals input at the timing shown in Figure 9, the M37754FFCGP and the M37754FFCHP output the contents of the specified address from the data I/O pins to the external. V ...
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... The command code is latched into the internal command latch at the rising edge of the WE input. When control signals are input in the second cycle at the timing shown in Figure 10, the M37754FFCGP and the M37754FFCHP output the programmed address’s contents ___ to the external ...
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... WE input, and the command code is internally latched at the rising ___ edge of the WE input. When control signals are input in the second cycle at the timing shown in Figure 11, the M37754FFCGP and the M37754FFCHP output the contents of the specified address to the external. Note: If any memory location where the contents have not been erased is found in the erase verify operation, execute the op- eration of “ ...
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... FF third cycle, the erase or program command is disabled (i.e., reset), and the M37754FFCGP and the M37754FFCHP are placed in the read mode. If the reset command is executed, the contents of the memory does not change. Device identification code command ...
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... SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION Erase H PP YES PASS VERIFY BYTE ? FAIL FAIL 00 16 INC ADRS DEVICE FAILED MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP START = ALL BYTES = PROGRAM ALL BYTES = 00 16 ADRS = first location WRITE ERASE ...
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... ° ± unless otherwise noted Parameter Parameter MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Limits Min. Typ. Max 100 , 100 100 1 11.4 12.0 12.6 Limits Min. Max. ...
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... P7 100 1 Fig. 13 Pin connection of M37754FFCGP when operating in serial I/O mode SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION pins high after connecting wires as shown in Figures 13, 14 and powering on the V In the serial I/O mode, the user can use seven types of software commands: bank (0, 1) select, read, program, program verify, auto erase, and error check ...
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... P9 5 100 Fig. 14 Pin connection of M37754FFCHP when operating in serial I/O mode 26 SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION M37754FFCHP : Connect to the ceramic oscillation circuit. : Connect the BYTE pin to V Outline 100P6Q-A MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP 50 P10 7 49 P11 0 48 P11 1 47 P11 ...
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... CH SCLK SDA ) 16 OE BUSY MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Third Fourth ————— ————— ————— ————— Read data (Output) Program data (Input) — ...
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... Input command code 00 in the first transfer. Proceed and input the 16 low-order 8 bits and the high-order 8 bits of the address and pull the __ OE pin low. When this is done, the M37754FFCGP and the M37754FFCHP read out the contents of the specified address, and t CH SCLK ...
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... BUSY Fig. 17 Timings during programming Program verify command Input command code C0 in the first transfer. Proceed and drive the pin low. When this is done, the M37754FFCGP and the M37754FFCHP verify-read the programmed address’s contents, SCLK SDA OE BUSY “L” ...
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... SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION Auto erase is completed when all memory contents are erased, and the BUSY pin is pulled low. Note: In the auto erase operation, the M37754FFCGP and the M37754FFCHP automatically repeat the erase and verify op- erations internally. Therefore, erase is completed by execut- ing the command once ...
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... SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION ( ° ± MHz, unless otherwise noted) IN Parameter t c(CK) t r(CK) t w(CKH) t h(C-Q) t h(C- su(D-C) h(C-D) MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP = 12 V ± unless otherwise noted and Limits Min. Max. (Note 1) 400 (Note 1) 400 (Note 2) ...
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... Flash memory mode-3 (CPU reprogramming mode) The M37754FFCGP and the M37754FFCHP have the CPU repro- gramming mode where a built-in flash memory is handled by the cen- tral processing unit (CPU). 112 Kbytes (addresses 001000 00EFFF and addresses 011000 to 01EFFF 16 16 flash memory shown in Figure 1 can be reprogrammed (erase and program) ...
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... Read command When “00 " itten to the flash command register, 16 M37754FFCGP and the M37754FFCHP enter the read mode. The contents of the corresponding address can be read by reading the flash memory (For instance, with the LDA instruction etc.) under this condition. The read mode is maintained until another command code is written to the flash command register ...
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... Erase verify command When “A0 16 M37754FFCGP and the M37754FFCHP enter the erase verify mode. Subsequently to this, if the instruction (for instance, LDA in- struction) for reading byte data from the address to be verified, the contents of the address is read. CPU must erase and verify to all erased areas in a unit of address. ...
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... YES 40 16 DIN YES PASS VERIFY BYTE ? FAIL FAIL 00 16 DEVICE NO INC ADRS FAILED WRITE READ COMMAND MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP START ALL BYTES = PROGRAM ALL BYTES = 00 16 ADRS = first location WRITE ERASE 20 16 COMMAND WRITE ERASE 20 16 ...
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... M37754FFCGP and the M37754FFCHP enters the reset mode. The contents of the memory does not change even if the reset com- mand is executed. Auto erase ” ...
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... Low-speed running High-speed running for ports P4, P5, P6, P7, and P9 must be 110 mA or less, the OL(peak) )’s maximum limit is 12.5 MHz at low-speed running and is 20 MHz at high-speed IN MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Ratings –0 –0 –0 (Note –0 +0.3 CC ...
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... BYTE SS – pull-up transistor Pull-up transistor used I When clock is stoped. Output-only pin is open and other pins are Vss during reset. MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP ) = 40 MHz (Note)) IN Limits Typ. Max. Min. 3.4 4.8 3.4 4.8 3.4 4.8 2 0.45 1.6 0.4 2 0.4 1 0.4 0.2 0.5 0.1 0.3 5 –5 – ...
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... Low-speed running 8-bit mode (f MHz) (Note 2) IN Comparator ) is 20 MHz or less at the high-speed running, and f – °C, unless otherwise noted) a Test conditions (Note) .” 16 MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Limits Unit Min. Typ. Max. 10 Bits REF 256 ± 3 LSB ± ...
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... MHz). At this time, the clock source select bit is “0.” Parameter f MHz IN f MHz IN Parameter Parameter MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP = – °C, unless otherwise noted MHz in high- IN Limits Unit Min. Max Limits Unit Min ...
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... SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION Parameter tc (TA) t w(TAH) t w(TAL) t c(UP) t w(UPL su(UP-T ) h(T -UP c(TA su(TAj -TAj ) su(TAj -TAj IN OUT IN OUT t su(TAj -TAj ) OUT IN MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Limits Min. Max. 800 200 200 ) t su(TAj -TAj ) OUT IN Unit ...
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... IN f MHz IN f MHz IN input high-level pulse width and the TBi IN )/2 in low-speed running (f MHz). At this time, the clock source select bit is “0.” Parameter MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Limits Unit Min. Max 160 Limits Unit Min ...
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... SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION Parameter Parameter t c(TB) t w(TBL) t c(AD) w(ADL) t c(CK) w(CKH) t w(CKL d su w(INL) t w(INH) = 100 pF L MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Limits Min. Max. 200 100 100 Limits Min. Max. 250 250 Unit ...
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... MHz when the clock source select bit = “0” , unless Parameter = 5 V± – °C, f Parameter MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Limits Min. Max MHz when the clock source select bit = IN Limits Min. ...
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... RD and WR signals’ rise regardless of the bus mode and the number of waits 1-HLDA) t pxz(HLDA-RDZ) Hi-Z t pxz(HLDA-WRZ) Hi-Z t pxz(HLDA-BHE) Hi-Z t pxz(HLDA-AZ) Hi-Z t pxz(HLDA-DLZ/DHZ) Hi 100 MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP t h( 1-HOLD 1-HLDA) t pzx(HLDA-RDZ) t pzx(HLDA-WRZ) t pzx(HLDA-BHE) t pzx(HLDA-AZ) t pzx(HLDA-DLZ/DHZ) 45 ...
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... MHz when the clock source select bit = “0” , unless Parameter su(PiD – 2 100 pF L MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Limits Min. Max – – Limits Min. Max. ...
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... MHz when the clock source select bit = “0” , unless Parameter ’s minimum limit and t /t ratios w( calculate them using the bus timing data formula on the page after IN ITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Limits Unit Min. Max – – ...
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... – °C, f Parameter low-level pulse width (Note) ), calculate them using the bus timing data formula on the next page. IN MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP ) = 25 MHz when the clock source select bit = “0” access 3- access 4- access Min. Max. ...
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... IN IN ITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP = – °C, f MHz when access 3- access 4- access – 60 – 60 – 60 f(X ) f ...
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... Address Data t h(ALE-LA) t d(LA-ALE) is accessed 4 )) Test conditions (Port Pi, f(X IN • 2 100 pF • Input timing voltage : • Output timing voltage : V MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP -WR h(WR-BHE) t h(WR-A) t h(WR-CS) t h(WR-DLQ/DHQ) t pxz(WR-DLZ/DHZ) t h(WR-DLQ) t d(WR-PiQ 1 4 ...
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... Data t su(PiD-RD) Input data is accessed 4 Test conditions (Port Pi, f(X • • Input timing voltage : 100 • Output timing voltage : V ITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP t d( -RD h(RD-BHE) t h(RD-A) t h(RD-CS) t h(RD-DL/DH) t pzx(RD-DLZ) t h(RD-DL) t h(RD-PiD 1 4 ...
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... Address t t d(LA-ALE) h(ALE-LA) is accessed 4 Test conditions (Port Pi, f(X )) • • Input timing voltage : 100 • Output timing voltage : V MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP t d( -WR h(WR-BHE) t h(WR-A) t h(WR-CS) t h(WR-DLQ/DHQ) Output data t pxz(WR-DLZ/DHZ) t h(WR-DLQ) Data t d(WR-PiQ ...
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... Address t d(LA-ALE) t h(ALE-LA) t su(LA-DL) is accessed 4 Test conditions (Port Pi, f(X • • Input timing voltage : 100 pF L • Output timing voltage : V ITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP t d( -RD) 1 w(RD) t h(RD-BHE) t h(RD-A) t h(RD-CS) t su(DL/DH-RD) t h(RD-DL/DH) Input data t pzx(RD-DLZ) t su(DL-RD) t h(RD-DL) Data t su(PiD-RD) ...
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... Address t h(ALE-LA) t d(LA-ALE) is accessed 4 Test conditions (Port Pi, f(X • • Input timing voltage : 100 • Output timing voltage : V MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP t -WR) d( -WR w(WR) t h(WR-BHE) t h(WR-A) Address t h(WR-CS d(WR-DLQ/DHQ) h(WR-DLQ/DHQ) Output data t pxz(WR-DLZ/DHZ) ...
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... Address t h(ALE-LA) t d(LA-ALE) t su(LA-DL) is accessed 4 Test conditions (Port Pi, f • • Input timing voltage : 100 • Output timing voltage : V ITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP t -RD) d( -RD w(RD) t h(RD-BHE) t h(RD-A) t h(RD-CS) t su(DL/DH-RD) t h(RD-DL/DH) Input data t pzx(RD-DLZ) t su(DL-RD) t h(RD-DL) Data ...
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... MHz when the clock source select bit = “0” , unless Parameter ’s minimum limit and t /t ratios w( calculate them using the bus timing data formula on the page after IN MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP Limits Unit Min. Max – – ...
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... IN ITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP ) = 40 MHz when the clock source select bit = IN 3- access 4 access 5- access Min. Max. Min. Max. Min. ...
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... Note: When the clock source select bit is “1”, regard f(X 58 SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION = 5 V± Parameter low-level pulse width ) in tables as 2·f MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP = – °C, f MHz when access 4- access 5- access ...
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... Address t d(LA-ALE) is accessed 4 Test conditions (Port Pi, f • • Input timing voltage : 100 • Output timing voltage : ITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP -WR) d( -WR w(WR) t h(WR-BHE) t h(WR-A) Address t h(WR-CS) t d(WR-DLQ/DHQ) t h(WR-DLQ/DHQ) Output data ...
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... Test conditions (Port Pi, f • • Input timing voltage : 100 • Output timing voltage : MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP t d( -RD w(RD) t h(RD-BHE) t h(RD-A) t h(RD-CS) t su(DL/DH-RD) t h(RD-DL/DH) Input data t pzx(RD-DLZ) t su(DL-RD) t h(RD-DL) ...
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... Address t h(ALE-LA) t d(LA-ALE) is accessed 4 Test conditions (Port Pi, f • • Input timing voltage : 100 • Output timing voltage : V = 2.5 V ITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP t d( -WR) d( -WR w(WR) t h(WR-BHE) t h(WR-A) Address t h(WR-CS) Chip select t t d(WR-DLQ/DHQ) h(WR-DLQ/DHQ) Output data ...
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... Address t h(ALE-LA) t d(LA-ALE) t su(LA-DL) is accessed 4 Test conditions (Port Pi, f(X )) • • Input timing voltage : 100 • Output timing voltage : V MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP t -RD) d( -RD w(RD) t h(RD-BHE) t h(RD-A) Address t h(RD-CS) Chip select t su(DL/DH-RD) t h(RD-DL/DH) Input data t pzx(RD-DLZ) ...
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... Address t h(ALE-LA) t d(LA-ALE) is accessed 4 Test conditions (Port Pi, f(X • • Input timing voltage : 100 • Output timing voltage : V ITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP w(WR) t h(WR-BHE) t h(WR-A) Address t h(WR-CS) Chip select t h(WR-DLQ/DHQ) Output data t pxz(WR-DLZ/DHZ) t h(WR-DLQ) Data t ...
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... Address t h(ALE-LA) t d(LA-ALE) t su(LA-DL) is accessed 4 Test conditions (Port Pi, f(X • • Input timing voltage : 100 • Output timing voltage : V MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP t d( -RD w(RD) t h(RD-BHE) t h(RD-A) t h(RD-CS) t su(DL/DH-RD) t h(RD-DL/DH) Input data t pzx(RD-DLZ su(DL-RD) h(RD-DL) Data ...
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... MHz when the clock source select bit = “1” f MHz when the clock source select bit = “1”. IN SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION ) 40 MHz when the clock source select bit = “0” Parameter ITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP MHz IN Bus timing Unit data formula Min. Max ...
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... Address t h(WR-CS) t h(WR-DLQ/DHQ) t d(WR-DLQ/DHQ) Data t pxz(WR-DLZ/DHZ) The value of output data is undefined. = 100 pF L MITSUBISHI MICROCOMPUTERS M37754FFCGP M37754FFCHP t t w(H) w( -RD w(RD w(ALE) d(ALE-RD) t h(RD-BHE) t d(BHE-RD) t ...
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Keep safety first in your circuit designs! • Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead ...
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... For the following register, it’s internal status after reset is corrected: • Target register: processor mode register 0 (address 5E • Correction: the status of bit 1 is “0”. (Not “1”.) • Related page: page 12 M37754FFCGP, M37754FFCHP DATA SHEET Revision Description )”, it’s name is corrected: 16 ...