M37733 MITSUBISHI [Mitsubishi Electric Semiconductor], M37733 Datasheet - Page 5

• Manufacturer Part Number: M37733
• Description: 16-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

BASIC FUNCTION BLOCKS
T h e M 3 7 7 3 3 S 4 B F P h a s t h e s a m e f u n c t i o n s a s t h e
M37733MHBXXXFP except for the following :
(1) The memory map is different.
(2) The processor mode is different.
(3) The reset circuit is different.
(4) Pulse output port mode of timer A is available.
(5) The function of ROM area modification is not available.
MEMORY
The memory map is shown in Figure 1. The address space has a
capacity of 16 Mbytes and is allocated to addresses from 0
FFFFFF
The banks are numbered from 0
Built-in RAM and control registers for internal peripheral devices are
assigned to bank 0
Addresses FFD6
addresses and contain the interrupt vectors. Use ROM for memory
of this address.
Fig. 1 Memory map
16
. The address space is divided by 64-Kbyte unit called bank.
Bank FF
Bank 0
Bank 1
Bank FE
16
16
16
16
16
16
to FFFF
.
FE0000
FEFFFF
FF0000
FFFFFF
000000
00FFFF
010000
01FFFF
: External
: Internal
16
are the RESET and interrupt vector
16
16
16
16
16
16
16
16
16
to FF
16
.
16
00FFD6
000000
00007F
000080
00087F
00FFFF
to
16
16
16
16
16
16
The 2048-byte area allocated to addresses from 80
built-in RAM. In addition to storing data, the RAM is used as stack
during a subroutine call or interrupts.
Peripheral devices such as I/O ports, A-D converter, serial I/O, timer,
and interrupt control registers are allocated to addresses from 0
7F
A 256-byte direct page area can be allocated anywhere in bank 0
by using the direct page register (DPR). In the direct page addressing
mode, the memory in the direct page area can be accessed with two
words. Hence program steps can be reduced.
16
Internal RAM
2048 bytes
.
MITSUBISHI MICROCOMPUTERS
16-BIT CMOS MICROCOMPUTER
00FFD6
00007F
00FFFE
000000
16
16
16
16
M37733S4BFP
Interrupt vector table
UART1 transmission
UART0 transmission
Internal peripheral
A-D/UART2 trans./rece.
detail information
control registers
refer to Fig. 2 for
BRK instruction
UART1 receive
UART0 receive
Watchdog timer
INT
Zero divide
Timer B2
Timer B1
Timer B0
Timer A4
Timer A3
Timer A2
Timer A1
Timer A0
devices
2
/Key input
RESET
INT
INT
DBC
0
1
16
to 87F
16
is the
16
to
16
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