HT83003 HOLTEK [Holtek Semiconductor Inc], HT83003 Datasheet - Page 8

• Manufacturer Part Number: HT83003
• Description: Q-Voice
• Manufacturer: HOLTEK [Holtek Semiconductor Inc]

Functional Description
Execution Flow
The system clock for the HT83XXX series is derived
from RC oscillator. It is internally divided into four
non-overlapping clocks. One instruction cycle consists
of four system clock cycles.
Instruction fetching and execution are pipelined in such
a way that a fetch takes one instruction cycle while de-
coding and execution takes the next instruction cycle.
However, the pipelining scheme causes each instruc-
tion to effectively execute within one cycle. If an instruc-
tion changes the program counter, two cycles are
required to complete the instruction.
Program Counter - PC
The 11-bit program counter (PC) controls the sequence
in which the instructions stored in program ROM are ex-
ecuted.
After accessing a program memory word to fetch an in-
struction code, the contents of the program counter are
Note: *10~*0: Program counter bits
Rev. 0.10
Initial Reset
Time Base Overflow
Timer Counter 0 Overflow
Timer Counter 1 Overflow
Skip
Loading PCL
Jump, Call Branch
Return from Subroutine
#10~#0: Instruction code bits
Mode
S10
#10
*10
*10
0
0
0
0
S9
#9
*9
*9
0
0
0
0
#8
S8
*8
*8
Program Counter
Preliminary
0
0
0
0
Execution Flow
@7
S7
#7
*7
0
0
0
0
8
incremented by one. The program counter then points
to the memory word containing the next instruction
code.
When executing a jump instruction, conditional skip ex-
ecution, loading PCL register, subroutine call, initial re-
set, internal interrupt or return from subroutine, the PC
manipulates the program transfer by loading the ad-
dress corresponding to each instruction.
The conditional skip is activated by instruction. Once the
condition is met, the next instruction, fetched during the
current instruction execution, is discarded and a dummy
cycle takes its place while the correct instruction is ob-
tained.
The lower byte of the program counter (PCL) is a
read/write register (06H). Moving data into the PCL per-
forms a short jump. The destination must be within 256
locations.
When a control transfer takes place, an additional
dummy cycle is required.
S10~S0: Stack register bits
@7~@0: PCL bits
@6
Program Counter
#6
S6
*6
0
0
0
0
PC+2
@5
S5
#5
*5
0
0
0
0
@4
#4
S4
*4
0
0
0
0
@3
S3
#3
*3
0
0
1
1
@2
#2
S2
*2
0
1
0
1
August 25, 2003
HT83XXX
@1
S1
#1
*1
0
0
0
0
@0
#0
S0
*0
0
0
0
0