HT83003 HOLTEK [Holtek Semiconductor Inc], HT83003 Datasheet - Page 11

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HT83003

Manufacturer Part Number
HT83003
Description
Q-Voice
Manufacturer
HOLTEK [Holtek Semiconductor Inc]
Datasheet
Note:
Indirect Addressing Register
Location 00H is indirect addressing registers that are
not physically implemented. Any read/write operation of
[00H] accesses the RAM pointed to by MP0 (01H) re-
spectively. Reading location 00H indirectly returns the
result 00H. While, writing it indirectly leads to no opera-
tion.
Accumulator - ACC (05H)
The accumulator (ACC) is related to the ALU opera-
tions. It is also mapped to location 05H of the RAM and
is capable of operating with immediate data. The data
movement between two data memory locations must
pass through the ACC.
Arithmetic and Logic Unit - ALU
This circuit performs 8-bit arithmetic and logic opera-
tions and provides the following functions:
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·
·
·
·
Rev. 0.10
2BH~2FH Unused
30H~7FH User data RAM
Address RAM Mapping
Arithmetic operations (ADD, ADC, SUB, SBC, DAA)
Logic operations (AND, OR, XOR, CPL)
Rotation (RL, RR, RLC, RRC)
Increment and Decrement (INC, DEC)
Branch decision (SZ, SNZ, SIZ, SDZ etc)
0AH
0BH
0DH
0EH
1AH
2AH
10H
11H
12H
13H
18H
19H
26H
28H
R: Read only
W: Write only
R/W: Read/Write
TMR0
TMR1
TMR1C
PA
PAC
LATCH0H
LATCH0M
PWMCR
PWMD
STATUS
INTC
TMR0C
LATCH0L
LATCHD
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Status register
Interrupt control register 0
Timer counter 0 register
Timer counter 0 control register
Timer counter 1 register
Timer counter 1 control register
Port A I/O data register
Port A I/O control register
Voice ROM address latch 0 [A17, A16]
Voice ROM address latch 0 [A15~A8]
Voice ROM address latch 0 [A7~A0]
PWM control register
PWM output data D7~D0
Voice ROM data register
User data RAM
Preliminary
11
Status Register - STATUS (0AH)
This 8-bit STATUS register (0AH) consists of a zero flag
(Z), carry flag (C), auxiliary carry flag (AC), overflow flag
(OV), power down flag (PDF), watchdog time-out flag
(TO). It also records the status information and controls
the operation sequence.
Except the TO and PDF flags, bits in the status register
can be altered by instructions similar to other registers.
Data written into the status register does not alter the TO
or PDF flags. Operations related to the status register,
however, may yield different results from those in-
tended. The TO and PDF flags can only be changed by
a Watchdog Timer overflow, chip power-up, or clearing
the Watchdog Timer and executing the ²HALT² instruc-
tion. The Z, OV, AC, and C flags reflect the status of the
latest operations.
On entering the interrupt sequence or executing the
subroutine call, the status register will not be automati-
cally pushed onto the stack. If the contents of the status
is important, and if the subroutine is likely to corrupt the
status register, the programmer should take precautions
and save it properly.
Description
August 25, 2003
HT83XXX

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