EP7312-IB-90 CIRRUS [Cirrus Logic], EP7312-IB-90 Datasheet - Page 46

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EP7312-IB-90

Manufacturer Part Number
EP7312-IB-90
Description
High-performance, Low-power, System-on-chip with SDRAM & Enhanced with SDRAM & Enhanced
Manufacturer
CIRRUS [Cirrus Logic]
Datasheet
EP7312
High-Performance, Low-Power System on Chip
256-Ball PBGA Package Characteristics
46
Y11
Y12
Y13
Y14
Y15
Y16
Y17
Y18
Y19
Y20
Ball Location
* “With p/u” means with internal pull-up of 100 KOhms on the pin.
Input. Port A,B,D,E GPIOs default to input at nPOR and URESET conditions.
Strength 2 = 12 ma
Strength 1 = 4 ma
Note:
1) For pin locations see
2) Dimensions are in millimeters (inches), and controlling dimension is millimeter
3) Before beginning any new EP7312 design, contact Cirrus Logic for the latest package information.
SMPCLK
FB[1]
COL[6]
COL[3]
COL[1]
D[31]
D[28]
D[27]
A[25]/DRA[2]
VDDIO
Name
Table
Strength
1
1
1
1
1
1
1
2
22.
Table 21. 204-Ball TFBGA Ball Listing (Continued)
©
Figure 18. 256-Ball PBGA Package
Copyright Cirrus Logic, Inc. 2005
Reset
State
High
High
High
Low
Low
Low
Low
Low
(All Rights Reserved)
Pad power
Type
I/O
I/O
I/O
O
O
O
O
O
I
SSI1 ADC sample clock
PWM feedback input
Keyboard scanner column drive
Keyboard scanner column drive
Keyboard scanner column drive
Data I/O
Data I/O
Data I/O
System byte address / SDRAM address
Digital I/O power, 3.3V
Description
DS508F1

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