M3850 RENESAS [Renesas Technology Corp], M3850 Datasheet - Page 3

• Manufacturer Part Number: M3850
• Description: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
• Manufacturer: RENESAS [Renesas Technology Corp]

Table 1 Pin description
3850 Group (Spec.A)
Rev.2.10
REJ03B0093-0210
P1
V
CNV
V
AVss
X
X
P0
P0
P0
P0
P0
P2
P2
P2
P2
P2
P2
P2
P2
S
P3
P3
P4
P4
P4
P4
P4
RESET
CC
IN
OUT
RDY1
REF
4
0
0
1
2
3
0
1
2
3
4
5
6
7
0
4
0
1
2
3
4
/AN
–P1
/S
/S
/S
/S
/X
/X
/RxD
/TxD
/S
/CNTR
/AN
/AN
/CNTR
/INT
/INT
/INT
/INT
, V
SS
IN2
OUT2
CLK2
RDY2
COUT
CIN
CLK1
Pin
5
SS
–P0
7
0
4
0
1
2
3
–
/S
/PWM
0
1
2005.11.14
7
CMP2
/
/AN
8
CNV
Clock input
Clock output
I/O port P2
I/O port P3
Power source
Reference voltage
Analog power
source
Reset input
I/O port P0
I/O port P1
I/O port P4
SS
Name
page 3 of 86
input
•Apply voltage of 2.7 V – 5.5 V to Vcc, and 0 V to Vss.
•This pin controls the operation mode of the chip.
•Normally connected to V
•Reference voltage input pin for A/D converter.
•Analog power source input pin for A/D converter.
•Connect to Vss.
•Reset input pin for active “L”.
•Input and output pins for the clock generating circuit.
•Connect a ceramic resonator or quartz-crystal oscillator between the X
•When an external clock is used, connect the clock source to the X
•8-bit CMOS I/O port.
•I/O direction register allows each pin to be individually
•CMOS compatible input level.
•CMOS 3-state output structure.
•Pull-up control is enabled in a byte unit.
•P1
•8-bit CMOS I/O port.
•I/O direction register allows each pin to be individually
•CMOS compatible input level.
•P2
•P2
•Pull-up control of P2
•5-bit CMOS I/O port with the same function as port P0.
•CMOS compatible input level.
•CMOS 3-state output structure.
•Pull-up control is enabled in a bit unit.
•5-bit CMOS I/O port with the same function as port P0.
•CMOS compatible input level.
•CMOS 3-state output structure.
•Pull-up control is enabled in a bit unit.
the oscillation frequency.
pin open.
programmed as either input or output.
for LED drive.
programmed as either input or output.
byte unit.
0
0
2
, P2
, P2
to P1
1
3
, P2
: N-channel open-drain structure.
7
(8 bits) are enabled to output large current
4
to P2
7
: CMOS3-state output structure.
0
Functions
, P2
SS
.
1
, P2
4
–P2
7
is enabled in a
• Sub-clock generating circuit I/O
• Serial I/O2 function pin
• A/D converter input pin
• Serial I/O1 function pin
• Serial I/O1 function pin/
• A/D converter input pin
• Timer Y function pin
• Interrupt input pins
• Interrupt input pin
• S
• Interrupt input pin
• PWM output pin
pins (connect a resonator)
Timer X function pin
Function except a port function
CMP2
output pin
IN
pin and leave the X
IN
and X
OUT
pins to set
OUT