M30621MCM-F546GP MITSUBISHI [Mitsubishi Electric Semiconductor], M30621MCM-F546GP Datasheet - Page 17
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M30621MCM-F546GP
Manufacturer Part Number
M30621MCM-F546GP
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
1.M30621MCM-F546GP.pdf
(24 pages)
Usage precaution
Stop Mode and Wait Mode
Timer B (pulse period/pulse width measurement mode)
A-D Converter
Interrupts
(1) If changing the measurement mode select bit is set after a count is started, the timer Bi interrupt
(2) When the first effective edge is input after a count is started, an indeterminate value is transferred to
(1) Write to each bit (except bit 6) of A-D control register 0, to each bit of A-D control register 1, and to bit
(2) When changing A-D operation mode, select analog input pin again.
(3) Using one-shot mode or single sweep mode
(4) Using repeat mode, repeat sweep mode 0 or repeat sweep mode 1
(1) When returning from stop mode by hardware reset, RESET pin must be set to “L” level until main clock
(2) When switching to either wait mode or stop mode, instructions occupying four bytes either from the
(1) Reading address 00000
(2) Setting the stack pointer
(3) The NMI interrupt
Read the correspondence A-D register after confirming A-D conversion is finished. (It is known by A-
D conversion interrupt request bit.)
Use the undivided main clock as the internal CPU clock.
request bit goes to “1”.
the reload register. At this time, timer Bi interrupt request is not generated.
0 of A-D control register 2 when A-D conversion is stopped (before a trigger occurs).
elapse of 1 s or longer.
oscillation is stabilized.
WAIT instruction or from the instruction that sets the every-clock stop bit to “1” within the instruction
queue are prefetched and then the program stops. So put at least four NOPs in succession either to
the WAIT instruction or to the instruction that sets the every-clock stop bit to “1”.
In particular, when the Vref connection bit is changed from “0” to “1”, start A-D conversion after an
• When maskable interrupt is occurred, CPU read the interrupt information (the interrupt number
• The value of the stack pointer immediately after reset is initialized to 0000
• The NMI interrupt can not be disabled. Be sure to connect NMI pin to Vcc via a pull-up resistor if
• Do not get either into stop mode with the NMI pin set to “L”.
and interrupt request level) in the interrupt sequence.
The interrupt request bit of the certain interrupt written in address 00000
Reading address 00000
Though the interrupt is generated, the interrupt routine may not be executed.
Do not read address 00000
interrupt before setting a value in the stack pointer may become a factor of runaway. Be sure to
set a value in the stack pointer before accepting an interrupt.
When using the NMI interrupt, initialize the stack point at the beginning of a program. Concerning
the first instruction immediately after reset, generating any interrupts including the NMI interrupt is
prohibited.
unused.
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by software sets enabled highest priority interrupt source request bit to “0”.
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by software.
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.
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SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
M16C / 62M (80-pin version) Group
16
will then be set to “0”.
(Low voltage version)
Mitsubishi microcomputers
16
. Accepting an
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