COP889EB NSC [National Semiconductor], COP889EB Datasheet - Page 49
COP889EB
Manufacturer Part Number
COP889EB
Description
8-Bit CMOS ROM Based Microcontrollers with 8k Memory, CAN Interface, 8-Bit A/D, and USART
Manufacturer
NSC [National Semiconductor]
Datasheet
1.COP889EB.pdf
(75 pages)
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B[4:3]
B2
B1
B0
Serial Peripheral Interface
PROGRAMMING THE SPI EXPANDER
If the SS Expander is enabled by setting SESSEN = 1 in the
SPI Control Register (SPICNTL), the N-port will be pro-
grammed with the content of the first MOSI-byte (i.e., the
content of the 1st byte [7:0] appears at N-port[7:0] after com-
plete reception of the first byte), if the ESS programming
mode is detected. If any bytes follow after the 1st MOSI byte,
all data will be ignored by the SPI.
The ESS programming mode is detected by the ESS control
logic, which decodes the condition “MOSI = L at the falling
edge of SS. For further details, see Figure 39 .
SPIMOD[1:0]
SCE
SPIEN
SLOOP
SPI operation mode select
SPIMOD[1:0]
0 0: Slave mode,
1 0: Standard Master mode,
In the Master mode, 3 different SPI clock frequencies are available:
0 1: f
1 0: f
1 1: f
SPI active clock edge select
0: data are shifted out on the falling edge of SCK and are shifted in on the rising edge of SCK
1: data are shifted out on the rising edge of SCK and are shifted in on the falling edge of SCK
SPI enable
Enables the SPI interface and the alternate functions of the MISO, MOSI, SCK and SS pins.
0: disable SPI
1: enable SPI, all Port M ESS signals are set to 1
SPI loop back mode
0: disable loop back mode
1: enable loop back mode, MISO and MOSI are internally connected (see Figure 39 )
— SCK is SPI clock input
— MISO is SPI data output
— MOSI is SPI data input
— SS is slave select input
— SCK is SPI clock output (CKI/40)
— MISO is SPI data input
— MOSI is SPI data output
— SS is slave select output
SCK
SCK
SCK
= 1/(t
= 1/(4 t
= 1/(16 t
c
) = CKI/10
c
) = CKI/40
(Continued)
c
) = CKI/160
49
The selected N-port bits will be set to 1 after the positive
edge of SS.
Single N-port bits may be enabled for use as SS expansion,
or disabled to allow for general purpose I/O, by the respec-
tive bits in the PORTNX register.
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