COP889EB NSC [National Semiconductor], COP889EB Datasheet - Page 22
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COP889EB
Manufacturer Part Number
COP889EB
Description
8-Bit CMOS ROM Based Microcontrollers with 8k Memory, CAN Interface, 8-Bit A/D, and USART
Manufacturer
NSC [National Semiconductor]
Datasheet
1.COP889EB.pdf
(75 pages)
- Current page: 22 of 75
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CAN Interface Block
This device supports applications which require a low speed
CAN interface. It is designed to be programmed with two
transmit and two receive registers. The user’s program may
check the status bytes in order to get information of the bus
state and the received or transmitted messages. The device
has the capability to generate an interrupt as soon as one
byte has been transmitted or received. Care must be taken if
more than two bytes in a message frame are to be
transmitted/received. In this case the user’s program must
poll the transmit buffer empty (TBE)/receive buffer full (RBF)
bits or enable their respective interrupts and perform a data
exchange between the user data and the Tx/Rx registers.
Fully automatic transmission on error is supported for mes-
sages not longer than two bytes. Messages which are longer
than two bytes have to be processed by software.
FIGURE 14. CAN Interface Block Diagram
22
The interface is compatible with CAN Specification 2.0 part
B, without the capability to receive/transmit extended
frames. Extended frames on the bus are checked and ac-
knowledged according to the CAN specification.
The maximum bus speed achievable with the CAN interface
is a function of crystal frequency, message length and soft-
ware overhead. The device can support a bus speed of up to
1 Mbit/s with a 10 MHz oscillator and 2 byte messages. The
1 Mbit/s bus speed refers to the rate at which protocol and
data bits are transferred on the bus. Longer messages re-
quire slower bus speeds due to the time required for soft-
ware intervention between data bytes. The device will sup-
port a maximum of 125k bit/s with eight byte messages and
a 10 MHz oscillator.
DS012837-16
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